Subband coding for image data archiving

The use of subband coding on image data is discussed. An overview of subband coding is given. Advantages of subbanding for browsing and progressive resolution are presented. Implementations for lossless and lossy coding are discussed. Algorithm considerations and simple implementations of subband systems are given

A reconfigurable multicarrier demodulator architecture

An architecture based on parallel and pipline design approaches has been developed for the Frequency Division Multiple Access/Time Domain Multiplexed (FDMA/TDM) conversion system. The architecture has two main modules namely the transmultiplexer and the demodulator. The transmultiplexer has two pipelined modules. These are the shared multiplexed polyphase filter and the Fast Fourier Transform (FFT). The demodulator consists of carrier, clock, and data recovery modules which are interactive. Progress on the design of the MultiCarrier Demodulator (MCD) using commercially available chips and Application Specific Integrated Circuits (ASIC) and simulation studies using Viewlogic software will be presented at the conference

High speed hardware development for FDMA/TDM system

The development of a transmultiplexor and a quadrature phase shift keying (QPSK) demodulator is discussed. The system is designed to meet real time signal processing requirements of future satellite systems and should consume very little power. The architectures of the transmultiplexor and the demodulator are designed for the pipelining of all the modules, namely the commutator, the filter bank fast fourier transform (FFT), and the internal modules of the QPSK. The architecture is designed for the case of 800 channels. Each channel is to have a bandwidth of 45 KHz and a bit rate of 64 Kb/s. In this case each module will have 22.22 micro seconds to complete a computation

Investigation of Different Constituent Encoders in a Turbo-code Scheme for Reduced Decoder Complexity

A large number of papers have been published attempting to give some analytical basis for the performance of Turbo-codes. It has been shown that performance improves with increased interleaver length. Also procedures have been given to pick the best constituent recursive systematic convolutional codes (RSCC's). However testing by computer simulation is still required to verify these results. This thesis begins by describing the encoding and decoding schemes used. Next simulation results on several memory 4 RSCC's are shown. It is found that the best BER performance at low E(sub b)/N(sub o) is not given by the RSCC's that were found using the analytic techniques given so far. Next the results are given from simulations using a smaller memory RSCC for one of the constituent encoders. Significant reduction in decoding complexity is obtained with minimal loss in performance. Simulation results are then given for a rate 1/3 Turbo-code with the result that this code performed as well as a rate 1/2 Turbo-code as measured by the distance from their respective Shannon limits. Finally the results of simulations where an inaccurate noise variance measurement was used are given. From this it was observed that Turbo-decoding is fairly stable with regard to noise variance measurement

A Single Chip VLSI Implementation of a QPSK/SQPSK Demodulator for a VSAT Receiver Station

This thesis presents a VLSI implementation of a QPSK/SQPSK demodulator. It is designed to be employed in a VSAT earth station that utilizes the FDMA/TDM link. A single chip architecture is used to enable this chip to be easily employed in the VSAT system. This demodulator contains lowpass filters, integrate and dump units, unique word detectors, a timing recovery unit, a phase recovery unit and a down conversion unit. The design stages start with a functional representation of the system by using the C programming language. Then it progresses into a register based representation using the VHDL language. The layout components are designed based on these VHDL models and simulated. Component generators are developed for the adder, multiplier, read-only memory and serial access memory in order to shorten the design time. These sub-components are then block routed to form the main components of the system. The main components are block routed to form the final demodulator

Effect of Steel Fibers on Reinforced Concrete Opening Corners

In the design of reinforced concrete structures, much of the attention is embarked towards calculation of the strength of basic structural elements like beams, columns and slabs. Comparatively lesser emphasis has been laid on the detailing, corresponding strength and behavior of corner joints, especially those subjected to opening moments as in the case of cantilever retaining walls, bridge abutments, channels, rectangular liquid retaining structures, beam column joints under earthquake loads. The detailing of reinforcement should be easier and simpler in order to expedite the construction process. At the same time structural member should satisfy the fundamental requirements of strength expressed in terms of controlled cracking and ductility. The result of a comprehensive experimental programme to evaluate the structure behavior of opening corners having U type detailing; corners reinforced with fibers is presented in this paper. The parameters of investigation are: strength measured in terms of joint efficiency, ductility, and crack control. A substantial increase in post-cracking tensile strength, ductility and crack control can be achieved by adding steel fibers to the concrete. Therefore U type detailing system investigated previously was tested afresh with crimped-type flat steel fibers having aspect ratio of 30 and 50 at different percentage volume fractions of 0.5%, 1.0%, 1.5% and 1.75%. The investigations indicate that in the specimen, there is a 30%-35% gain in efficiency with increase in volume fraction up to a certain limit beyond which there is a drop in mix workability and joint efficiency

Investigation of the Use of Erasures in a Concatenated Coding Scheme

A new method for declaring erasures in a concatenated coding scheme is investigated. This method is used with the rate 1/2 K = 7 convolutional code and the (255, 223) Reed Solomon code. Errors and erasures Reed Solomon decoding is used. The erasure method proposed uses a soft output Viterbi algorithm and information provided by decoded Reed Solomon codewords in a deinterleaving frame. The results show that a gain of 0.3 dB is possible using a minimum amount of decoding trials

Real-Time Selective Monitoring of Exposure Controlled Projection Lithography

Exposure Controlled Projection Lithography (ECPL) is a stereolithographic process in which incident radiation, patterned by a dynamic mask, passes through a transparent substrate to cure photopolymer which grows progressively from the substrate surface. We present here a novel method of capturing useful information about the curing process from a simple, inexpensive, real-time monitoring system based on interferometry. This approach can be used to provide feedback control to the ECPL process, thus making the process more robust and increasing system accuracy. The results obtained from this monitoring system provide a means to better visualize and understand the various phenomena occurring during the photopolymerization of transparent photopolymers. In order to lessen the measurement error, caused by internal diffraction within the substrate, the interferometry system has been designed such that the laser light used can be selectively targeted. This selective monitoring approach is experimentally validated to measure the height and profile of the cured part in real-time.Mechanical Engineerin