A REVIEW ON SPECTRUM SENSING METHODS FOR COGNITIVE RADIO NETWORKS

In Wireless Communication, Radio Spectrum is doing a vital role; for the future need it should use efficient. The existing system, it is not possible to use it efficiently where the allocation of spectrum is done based on fixed spectrum access (FSA) policy. Several surveys prove that it show the way to inefficient use of spectrum. An innovative technique is needed for spectrum utilization effectively. Using Dynamic spectrum access (DSA) policy, available spectrum can be exploited. Cognitive radio arises to be an attractive solution which introduces opportunistic usage of the frequency bands that are not commonly occupied by licensed users. Cognitive radios promote open spectrum allocation which is a clear departure from habitual command and control allocation process for radio spectrum usage. In short, it permits the formation of “infrastructure-less†joint network clusters which is called Cognitive Radio Networks (CRN). Conversely the spectrum sensing techniques are needed to detect free spectrum. In this paper, different spectrum sensing techniques are analyzed

XMPP for cloud computing in bioinformatics supporting discovery and invocation of asynchronous web services

Background: Life sciences make heavily use of the web for both data provision and analysis. However, the increasing amount of available data and the diversity of analysis tools call for machine accessible interfaces in order to be effective. HTTP-based Web service technologies, like the Simple Object Access Protocol (SOAP) and REpresentational State Transfer (REST) services, are today the most common technologies for this in bioinformatics. However, these methods have severe drawbacks, including lack of discoverability, and the inability for services to send status notifications. Several complementary workarounds have been proposed, but the results are ad-hoc solutions of varying quality that can be difficult to use. Results: We present a novel approach based on the open standard Extensible Messaging and Presence Protocol (XMPP), consisting of an extension (IO Data) to comprise discovery, asynchronous invocation, and definition of data types in the service. That XMPP cloud services are capable of asynchronous communication implies that clients do not have to poll repetitively for status, but the service sends the results back to the client upon completion. Implementations for Bioclipse and Taverna are presented, as are various XMPP cloud services in bio- and cheminformatics. Conclusion: XMPP with its extensions is a powerful protocol for cloud services that demonstrate several advantages over traditional HTTP-based Web services: 1) services are discoverable without the need of an external registry, 2) asynchronous invocation eliminates the need for ad-hoc solutions like polling, and 3) input and output types defined in the service allows for generation of clients on the fly without the need of an external semantics description. The many advantages over existing technologies make XMPP a highly interesting candidate for next generation online services in bioinformatics

SPECTRUM OF PERFORATIVE PERITONITIS – A PROSPECTIVE OBSERVATIONAL STUDY: Spectrum of Perforative peritonitis

Background and aims: Peritonitis secondary to gastro intestinal perforation is a common surgical emergency which has significant mortality and morbidity rates. The aim was to study the etiologies of perforative peritonitis, treatment modalities and treatment options. Materials and Methods: This was a prospective observational study conducted between January and December 2020. Patients with perforative peritonitis either clinically or radiologically were included in the study after obtaining informed consent. Etiology of perforation, surgical procedures, complications and outcome were observed and collected in preformed proforma. Data was collected in Microsoft excel and analysed. Results: Out of 94 patients, 92 underwent emergency surgery. 56.38%, (n=53/94) were in the age group of 31-60 years, 86.17%, n = 81/94 were males, 79.78%, (n=75/94) presented late to hospital, abdominal pain and tenderness were seen in all patients and pneumoperitoneum was seen in 58.51%, (n=55/94). Most common cause was peptic ulcer (46.80%, n = 20/94) and most common site of perforation was first part of duodenum (35.10%, n=33/94). 84.04%, (n=79/94) of surgeries were uneventful while surgical site infection was the common complication (40%, n=6/15). 80.85%, (n=76/94) of patients recovered uneventfully while 19.14% (n=18/94) expired. Conclusion: Peptic ulcer being the common etiology indicates improper peptic ulcer management. Early presentation to hospital and prompt resuscitation with surgical interventions can improve recovery and reduce mortality in perforative peritonitis

Multilevel Dodecagonal Voltage Space Vector Structure Generation for Open-End Winding IM Using a Single DC Source

In this paper, a new inverter topology is proposed for generating a multilevel dodecagonal voltage space vector structure for open-end winding induction motor (IM) using a single dc source. Dodecagonal voltage space vector structure eliminates fifth-and seventh-order harmonic voltages from phase voltage output and hence eliminates the fifth-and seventh-order harmonic currents through the motor leading to removal of the dominant sixth-order torque ripple generation in the motor over the entire modulation range. Multilevel space vector structure generates output voltage with better THD and low dv/dt. In the proposed topology, two three-level inverters drive an open-end winding IM, one inverter from each side. DC-link of primary inverter is from a dc source which delivers the entire active power, whereas the secondary inverter dc-link is maintained by a capacitor, which is self balanced during the inverter operation. The PWM scheme implemented ensures low switching frequency for primary inverter. Secondary inverter operates at a small dc-link voltage. Hence, switching losses are small for both primary and secondary inverters. Experimental results show the elimination of fifth-and seventh-order harmonic voltages over the entire modulation range, validating effectiveness of the proposed multilevel inverter scheme

Generation of Higher Number of Voltage Levels by Stacking Inverters of Lower Multilevel Structures With Low Voltage Devices for Drives

This paper proposes a new method of generating higher number of levels in the voltage waveform by stacking multilevel converters with lower voltage space vector structures. An important feature of this stacked structure is the use of low voltage devices while attaining higher number of levels. This will find extensive applications in electric vehicles since direct battery drive is possible. The voltages of all the capacitors in the structure can be controlled within a switching cycle using the switching state redundancies (pole voltage redundancies). This helps in reducing the capacitor size. Also, the capacitor voltages can be balanced irrespective of modulation index and load power factor. To verify the concept experimentally, a nine-level inverter is developed by stacking two five-level inverters and an induction motor is run using V/f control scheme. Both steady state and transient results are presented

Fifth- and Seventh-Order Harmonic Elimination With Multilevel Dodecagonal Voltage Space Vector Structure for IM Drive Using a Single DC Source for the Full Speed Range

This paper presents a method for generating a multilevel dodecagonal voltage space vector structure using a single dc source for induction motor drives. Multilevel dodecagonal structure combines the advantages of both multilevel and dodecagonal structures, and hence, generates low dv/dt phase voltage along with the elimination of fifth-and seventh-order harmonics over the entire modulation range. This eliminates low-order harmonic currents and prevents the generation of sixth-order torque ripple in the motor. The topology used requires only one dc source making four-quadrant operation of the drive system simpler compared to previously proposed multilevel topologies generating dodecagonal space vector structures. The topology used consists of a three-level flying capacitor (FC) inverter cascaded with a capacitor fed H-bridge. The FC inverter operates at a lower switching frequency and the low-order harmonics are eliminated by the switching action of the cascaded H-bridge inverter. The capacitors in the cascaded H-bridge modules are maintained at a substantially smaller voltage compared to the dc-link voltage and are inherently balanced during the pulse-width modulation operation. This results in low switching loss, in the FC inverter as well as in the cascaded H-bridge inverter. Experimental results are included to validate the operation of the topology and modulation scheme presented in this paper

A Predictive Capacitor Voltage Control of a Hybrid Cascaded Multilevel Inverter With a Single DC-Link and Reduced Common-Mode Voltage Operation

For cascaded multilevel inverter topologies with a single dc supply, closed-loop capacitor voltage control is necessary for proper operation. This paper presents zero and reduced common-mode voltage (CMV) operation of a hybrid cascaded multilevel inverter with predictive capacitor voltage control. Each phase of the inverter is realized by cascading two-three-level flying capacitor inverters with a half-bridge module in between. For the presented inverter topology, there are redundant switching states for each inverter voltage levels. By using these switching state redundancies, for every sampling instant, a cost function is evaluated based on the predicted capacitor voltages for each phase. The switching state that minimizes cost function is treated as the best and is switched for that sampling instant. The inverter operates with zero CMV for a modulation index upto 86%. For modulation indices from 86% to 96%, the inverter can operate with reduced CMV magnitude (V-dc/18) and reduced CMV switching frequency using the new space-vector pulsewidth modulation (SVPWM) presented herein. As a result, the linear modulation range is increased to 96% as compared to 86% for zero CMV operation. Simulation and experimental results are presented for the inverter topology for various steady state and transient operating conditions by running an induction motor drive with open loop V/f control scheme

Reduced Switch Count Seventeen Level Inverter Topology for Open-End Induction Motor Drives

This paper presents a seventeen level inverter topology for open end induction motor drives requiring only twelve switches per phase. One three-level inverter and one seven -level inverter with DC link voltages in 3:1 ratio are connected to the two ends of the stator winding of the induction motor to generate a seventeen level space vector structure. A level shifted carrier based scheme is used to modulate the inverter, which requires only instantaneous phase voltage references. Selection of switching states is used to ensure that both inverters supply real power to the motor the over entire modulation range, preventing overcharging of the DC bus. The topology was tested for steady state operation over the entire modulation range, and experimental results are included below

A Hybrid Seven Level Inverter Topology with a Single DC Supply and Reduced Switch Count

In this paper, a new three-phase hybrid seven level inverter topology with a single DC supply is proposed for the first time. The proposed inverter is realized by cascading two three level flying capacitor inverters with a half bridge module. The inverter topology is having multiple switching state redundancies for each of the pole voltage levels. By using these switching state redundancies, capacitor charging can be controlled in every PWM switching cycle. This feature is advantageous for reducing the capacitor sizing. Another advantage of the proposed inverter is that the charge balancing of each capacitor can be controlled irrespective of modulation index and load power factor. A hysteresis controller based capacitor charge control algorithm is implemented for the proposed inverter. Furthermore, the proposed topology uses lesser number of semiconductor devices, capacitors and DC power supplies compared to conventional seven level inverter topologies. The proposed topology is tested with open loop V/f control scheme in an induction motor drive. Inverter is tested for entire modulation range, and experimental results for steady-state operation are presented for various fundamental frequencies. Experimental results showing the effectiveness of capacitor charge control for both steady state and transient operating conditions are presented