Tunneling spectroscopy of gate-induced superconductivity in MoS2_2

The ability to gate-induce superconductivity by electrostatic charge accumulation is a recent breakthrough in physics and nano-electronics. With the exception of LaAlO$_3$/SrTiO$_3$ interfaces, experiments on gate-induced superconductors have been largely confined to resistance measurements, which provide very limited information about the superconducting state. Here, we explore gate-induced superconductivity in MoS$_2$ by performing tunneling spectroscopy to determine the energy-dependent density of states (DOS) for different levels of electron density $\textit{n}$. In the superconducting state, the DOS is strongly suppressed at energy smaller than the gap, \Delta, which is maximum (\Delta ~ 2 meV) for $\textit{n}$ of ~ 10$^{14}$ cm$^{-2}$ and decreases monotonously for larger $\textit{n}$. A perpendicular magnetic field $\textit{B}$ generates states at $E<\Delta$ that fill the gap, but a 20% DOS suppression of superconducting origin unexpectedly persists much above the transport critical field. Conversely, an in-plane field up to 10 T leaves the DOS entirely unchanged. Our measurements exclude that the superconducting state in MoS$_2$ is fully gapped and reveal the presence of a DOS that vanishes linearly with energy, the explanation of which requires going beyond a conventional, purely phonon-driven Bardeen-Cooper-Schrieffer mechanism

Spectroscopic investigation of ionic liquid gated van der Waals semiconductors and heterostructures

The fast paced research field of quantum electronics is dominated by the investigation of 2D van der Waals materials. This class of materials consist of different properties ranging from semiconductor, semimetal, superconductor, ferromagnetic and many more. Now with a further possibility to stack different 2D materials to form heterostructures, an unlimited potential of applications have risen. In this thesis we use Field effect transistor geometry with Ionic Liquid (IL) gating to investigate layered transition metal dichalcogenides. Using the spectroscopic capability of IL gating we investigate the band gap of an indirect semiconductor and with high carrier density accumulation drive the indirect semiconductor to emit light. In the second topic we use the ability of creating heterostructure to create an artificial semimetal and characterize its electronic properties. Lastly, we induce superconductivity in a semiconductor using IL and with clever engineering of heterostructure, investigate the fundamental superconducting state

Tunneling spectroscopy of gate-induced superconductivity in MoS2

AbstractData set for: Nature Nanotechnology 13, 483 (2018) https://doi.org/10.1038/s41565-018-0122-

Synthetic Semimetals with van der Waals Interfaces

The assembly of suitably designed van der Waals (vdW) heterostructures represents a new approach to produce artificial systems with engineered electronic properties. Here, we apply this strategy to realize synthetic semimetals based on vdW interfaces formed by two different semiconductors. Guided by existing ab initio calculations, we select WSe2 and SnSe2 mono- and multilayers to assemble vdW interfaces and demonstrate the occurrence of semimetallicity by means of different transport experiments. Semimetallicity manifests itself in a finite minimum conductance upon sweeping the gate over a large range in ionic liquid gated devices, which also offer spectroscopic capabilities enabling the quantitative determination of the band overlap. The semimetallic state is additionally revealed in Hall effect measurements by the coexistence of electrons and holes, observed by either looking at the evolution of the Hall slope with sweeping the gate voltage or with lowering temperature. Finally, semimetallicity results in the low-temperature metallic conductivity of interfaces of two materials that are themselves insulating. These results demonstrate the possibility to implement a state of matter that had not yet been realized in vdW interfaces and represent a first step toward using these interfaces to engineer topological or excitonic insulating states

Robust sub-100 nm T-Gate fabrication process using multi-step development

We demonstrate the fabrication of sub-100 nm T-Gate structures using a single electron beam lithography exposure and a tri-layer resist stack - PMMA/LOR/CSAR. Recent developments in modelling resist development were used to design the process, in which each resist is developed separately to optimise the resulting structure. By using a modelling approach and proximity correcting for the full resist stack, we were able to independently vary gate length (50-100 nm) and head size (250-500 nm) at the design stage and fabricate these T-Gates with high yield

Robust sub-100 nm T-gate fabrication process using multi-step development

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