37 research outputs found

    From ARTEMIS Requirements to a Cross-Domain Embedded System Architecture

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    International audienceThis paper gives an overview of the cross-domain component-based architecture GENESYS for embedded systems. The development of this architecture has been driven by key industrial challenges identified within the ARTEMIS Strategic Research Agenda (SRA) such as composability, robustness and integrated resource management. GENESYS is a platform architecture that provides a minimal set of core services and a plurality of optional services that are predominantly implemented as self-contained system components. Choosing a suitable set of these system components that implement optional services, augmented by application specific components, can generate domain-specific instantiations of the architecture (e.g., for automotive, avionic, industrial control, mobile, and consumer electronics applications). Such a cross-domain approach is needed to support the coming Internet of Things, to take full advantage of the economies of scale of the semiconductor industry and to improve productivity

    The GENESYS Architecture: A Conceptual Model for Component-Based Distributed Real-Time Systems

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    Abstract. This paper proposes a conceptual model and terminology for componentbased development of distributed real-time systems. Components are built on top of a platform, which offers core platform services as the basis for the implementation and integration of components. The core platform services enable emergence of global application services of the overall system out of local application services of the constituting components. Therefore, the core platform services provide elementary capabilities for the interaction of components, such as message-based communication between components or a global time base. Also, the core services are the instrument via which a component creates behavior that is externally visible at the component interface. In addition, the specification of a component's interface builds upon the concepts and operations of the core platform services. The component interface specification constrains the use of these operations and assigns contextual information (e.g., semantics in relation to the component environment) and significant properties (e.g., reliability requirements, energy constraints). Hence, the core platform services are a key aspect in the interaction between integrator and component developer

    Optimizing Performance of Continuous-Time Stochastic Systems using Timeout Synthesis

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    We consider parametric version of fixed-delay continuous-time Markov chains (or equivalently deterministic and stochastic Petri nets, DSPN) where fixed-delay transitions are specified by parameters, rather than concrete values. Our goal is to synthesize values of these parameters that, for a given cost function, minimise expected total cost incurred before reaching a given set of target states. We show that under mild assumptions, optimal values of parameters can be effectively approximated using translation to a Markov decision process (MDP) whose actions correspond to discretized values of these parameters

    Multi-criteria Resource Allocation in Modal Hard Real-Time Systems

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    In this paper, a novel resource allocation approach dedicated to hard real-time systems with distinctive operational modes is proposed. The aim of this approach is to reduce the energy dissipation of the computing cores by either powering them off or switching them into energy-saving states while still guaranteeing to meet all timing constraints. The approach is illustrated with two industrial applications, an engine control management and an engine control unit. Moreover, the amount of data to be migrated during the mode change is minimised. Since the number of processing cores and their energy dissipation are often negatively correlated with the amount of data to be migrated during the mode change, there is some trade-off between these values, which is also analysed in this paper

    Reuse of CAN-based Legacy Applications in Time-Triggered Architectures

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    Upcoming car series will be deployed with time-triggered communication protocols due to benefits with respect to bandwidth, predictability, dependability, and system integration. In present day automotive networks, CAN is the most widely used communication protocol. Today, up to five CAN buses and several private CAN networks result from the bandwidth limits of CAN in conjunction with constraints concerning bus utilization aimed at controlling transmission latencies. In this context, the upcoming introduction of time-triggered networks into series production offers the potential to reduce the number of CAN networks by exploiting the high-bandwidth of the time-triggered network instead of CAN buses. Due to the elimination of CAN buses, the resulting reduction of wiring and connectors promises a significant reduction in hardware cost and reliability improvements. In order to support the reuse of existing CAN-based application software, this paper presents a solution for the emulation of a CAN communication service on top of an underlying time-triggered network. By providing to CAN-based applications the same interface as in a conventional CAN system, redevelopment efforts for CAN-based legacy software are minimized. For this purpose, a CAN emulation middleware operates between a time-triggered operating system and the CAN-based applications. In a first step, the middleware establishes event channels on top of the time-triggered communication network in order to support on-demand transmission requests at a priori unknown points in time. The middleware then emulates the CSMA/CA media access protocol of a physical CAN network for passing messages received via event channels to the application in the correct temporal order. Finally, the API of the widely-used HIS/VectorCAN driver provides a handle-based programming interface with support for message filtering and callbacks. A validation setup with a TTP cluster demonstrates that the CAN emulation can handle CAN-based legacy software and a real-world communication matrix provided by the automotive industry

    Model-Based Design of the Communication System in an Integrated Architecture

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    The DECOS integrated architecture supports the sharing of a single time-triggered network for multiple application subsystems. As its communication infrastructure each application subsystem possesses a virtual network with guaranteed temporal properties, which is realized on top of the physical time-triggered network. This paper presents a solution for the model-based design of virtual networks in order to reduce development time and avoid design faults. A graphical modeling tool enables system engineers to create a virtual network model that captures all relevant properties for instantiating virtual networks in a specific application. The virtual network model forms the input to a code generator, the output of which can be deployed on the target system together with the application code. The development process is exemplified in an automotive example, which exploits virtual networks for application subsystems derived from present-day automotive architectures

    Specification and Execution of Gateways in Integrated Architectures

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    The DECOS integrated architecture divides the overall system into a set of nearly-independent distributed application subsystems, which share the node computers and the physical network of a single distributed computer system. This paper provides a solution to the controlled export and import of information between distributed application subsystems. We give the designer the ability to coordinate application services and exploit redundancy in a system to either improve reliability or reduce resource duplication. We introduce virtual gateways for the coupling of virtual networks by the selective redirection of messages. Virtual gateways not only resolve property mismatches between distributed application subsystems, but also preserve encapsulation. We capture the essential properties of each application subsystem in an interface specification based on timed automata and use this description as a parameterization of generic architectural gateway services
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