3 research outputs found

    Fabrication of MoS2 nanowire arrays and layered structures via the self-assembly of block copolymers

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    The electronics industry is beginning to show interest in 2D molybdenum disulfide (2D‐MoS2) as a potential device material due to its low band gap and high mobility. However, current methods for its synthesis are not “fab” friendly and require harsh environments and processes. Here, a novel method to prepare MoS2 nanowire arrays and layered structures via self‐assembly of a block copolymer system is reported. Well‐controlled films of microphase separated line‐space nanopatterns have been achieved by solvent annealing process. The self‐assembled films are used as “templates” for the generation of nonstoichometric molybdenum oxide by in situ inclusion technique following UV/Ozone treatment. Well‐ordered array of MoS2 and a layered structure are then prepared by chemical vapor deposition using sulfur powder at lower temperature. The surface morphology, crystal structure, and phases are examined by different microscopic and spectroscopic techniques. This strategy can be extended to several other 2D materials systems and open the pathway toward better optoelectronic and nanoelectromechanical systems

    Parallel arrays of sub-10 nm aligned germanium nanofins from an in-situ metal oxide hardmask using directed self-assembly of block copolymers

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    High-mobility materials and non-traditional device architectures are of key interest in the semiconductor industry because of the need to achieve higher computing speed and low power consumption. In this article, we present an integrated approach using directed self-assembly (DSA) of block copolymers (BCPs) to form aligned line-space features through graphoepitaxy on germanium on insulator (GeOI) substrates. Ge is an example of a high mobility material (III–V, II–VI) where the chemical activity of the surface and its composition sensitivity to etch processing offers considerable challenges in fabrication compared to silicon (Si). We believe the methods described here afford an opportunity to develop ultrasmall dimension patterns from these important high-mobility materials. High-quality metal oxide enhanced pattern transfer to Ge is demonstrated for the realization of nanofins with sub-10 nm feature size. Graphoepitaxial alignment of a poly(styrene)-block-poly(4-vinylpyridine) (PS-b-P4VP) BCP was achieved using predefined hydrogen silsesquioxane (HSQ) topography at a GeOI substrate. Subsequent impregnation of the aligned BCP templates with a salt precursor in situ and simple processing was used to generate robust metal oxide nanowire (e.g., Fe3O4, γ-Al2O3, and HfO2) hardmask arrays. Optimized plasma based dry etching of the oxide modified substrate allowed the formation of high aspect ratio Ge nanofin features within the HSQ topographical structure. We believe the methodology developed has significant potential for high-resolution device patterning of high mobility semiconductors. We envision that the aligned Ge nanofin arrays prepared here via graphoepitaxy might have application as a replacement channel material for complementary metal–oxide–semiconductor (CMOS) devices and integrated circuit (IC) technology. Furthermore, the low capital required to produce Ge nanostructures with DSA technology may be an attractive route to address technological and economic challenges facing the nanoelectronic and semiconductor industry
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