Charging Phenomena at the Interface Between High-k Dielectrics and SiOx Interlayers, Journal of Telecommunications and Information Technology, 2010, nr 1

The transition regions of GdSiO/SiOx and HfO2/SiOx interfaces have been studied with the high-k layers deposited on silicon substrates. The existence of transition regions was verified by medium energy ion scattering (MEIS) data and transmission electron microscopy (TEM). From measurements of thermally stimulated current (TSC), electron states were found in the transition region of the HfO2/SiOx structures, exhibiting instability attributed to the flexible structural molecular network expected to surround the trap volumes. The investigations were focused especially on whether the trap states belong to an agglomeration consisting of a single charge polarity or of a dipole constellation. We found that flat-band voltage shifts of MOS structures, that reach constant values for increasing oxide thickness, cannot be taken as unique evidence for the existence of dipole layers

Schottky Contacs on Silicon Nanowires

This thesis demonstrates the effect of charge on Schottky barrier height for metal contacts at the end surfaces of silicon nanowires. It is shown, by measurements and analytical models, how the effective electron barrier is lowered by a positive charge introduced into an oxide embedding the wire.As the scaling of MOSFET devices continue, the increasing contact resistance in source and drain have proven to be a difficult problem to overcome by conventional methods. A feasible option is to use metal electrodes forming Schottky contacts to the channel region. The main requirement for such a contact will be to achieve a very low energy barrier. Many different materials and methods have been studied in order to achieve a lower barrier but there is no optimal solution.The fabrication of a silicon nanowire device with palladium silicide Schottky contacts at the end surfaces of the wire is described. The Schottky contacts function as source and drain electrodes and the backside of an SOI wafer carrying the sample structures is used as a gate to achievetransistor behavior. Patterning of the nanowire is done by E-beam lithography and etching. The silicon core of the wires is surrounded by a thermally grown oxide. By measuring current vs. voltage at different temperatures the effective barrier heights of the Schottky contacts are extracted. Positive point charge is introduced into the oxide surrounding the wire by UV radiation. This charge changes the effective barrier height as demonstrated by measurements and theory. An electrostatic model is derived demonstrating the effect of charge on the total potential in thewire and in particular close to the contacts.It is demonstrated how the effective Schottky barrier for electrons is lowered due to the positive charge as an effect of increased tunneling while the hole barrier is correspondingly increasing

Influence of Electron Charge States in Nanoelectronic Building Blocks

The continued efforts to improve performance and decrease size of semiconductor logic devices are facing serious challenges. In order to further develop one of the most important nanoelectronic building blocks, the metal-oxide-semiconductor field-effect-transistor (MOSFET), several major problems have to be solved.This thesis deals with the influence of charge states on two specific issues related to the continued scaling of the MOSFET, the increasing source/drain resistance and the need for a high-k oxide in the MOS gate stack.A silicon nanowire with Schottky source/drain contacts is fabricated on a silicon-on-insulator substrate using electron-beam lithography. It is shown analytically and experimentally how the introduction of positive charge in the oxide surrounding the wire lowers the effective Schottkybarrier due to the added dipole potentials. By using the backside as a gate and measuring the current through the wire as a function of temperature, effective barrier heights of the source and drain contacts can be extracted.The Al/HfO$_{2}$/Si MOS structure has been studied in detail using electrical characterization methods primarily based on capacitance and conductance measurements. In particular, the properties of charge traps at the HfO$_{2}$/Si interface have been studied and it is shown that they resemble the traps found for SiO$_{2}$/Si interfaces, pointing to the existence of $P_{b}$ centers also for high-k oxides. It has also been found that an interlayer exists between the HfO$_{2}$ and Si regions. This transition region is an SiO$_{x}$-like material with a graded composition which can explain the occurrence of $P_{b}$-like traps at the interface. Furthermore the classical conductance method for investigations of oxide-semiconductor interfaces is extended in order to more accurately determine the energy dependence of capture cross sections. For traps at the interface, it is found that two different capture mechanisms dominate in different energyintervals: phonon cascade capture close to the conduction band and multi-phonon capture for deeper states

A new mechanism for modulation of Schottky barrier heights on silicon nanowires

For nanowires with Schottky barriers on the end surfaces, charges on the walls of the wire are close enough to the metal–semiconductor interface to influence the Schottky barrier. This is similar to an effect in planar structures, where impurities with energy levels below the Fermi level in the bulk of the substrate material will change charge state in the depletion region of a metal–semiconductor structure if the Schottky barrier is high enough to bring the impurity energy level above the Fermi level. The mechanism for barrier modulation is the same in both cases and occurs in nanowires as a result of the wire geometry

Schottky barriers on silicon nanowires influenced by charge configuration

Due to the geometry offered by nanowires, it is possible to introduce electric fields directed from the wire wall toward a Schottky contact positioned on the end surface of a wire. In the present work a simple model demonstrating the effect of charge on the wire walls close to the metal semiconductor interface is presented. This is also compared to measurements on fabricated nanowire devices, showing that additional positive charge close to the interface will lower the effective Schottky barrier height

A new mechanism for modulation of Schottky barrier heights on silicon nanowires

For nanowires with Schottky barriers on the end surfaces, charges on the walls of the wire are close enough to the metal–semiconductor interface to influence the Schottky barrier. This is similar to an effect in planar structures, where impurities with energy levels below the Fermi level in the bulk of the substrate material will change charge state in the depletion region of a metal–semiconductor structure if the Schottky barrier is high enough to bring the impurity energy level above the Fermi level. The mechanism for barrier modulation is the same in both cases and occurs in nanowires as a result of the wire geometry

Schottky barriers on silicon nanowires influenced by charge configuration

Due to the geometry offered by nanowires, it is possible to introduce electric fields directed from the wire wall toward a Schottky contact positioned on the end surface of a wire. In the present work a simple model demonstrating the effect of charge on the wire walls close to the metal semiconductor interface is presented. This is also compared to measurements on fabricated nanowire devices, showing that additional positive charge close to the interface will lower the effective Schottky barrier height