Recursive and Repetitive Hardware Models in VHDL

In this report, techniques for developing VHDL descriptions of recursive hardware structures are examined. In particular, both recursive and repetitive component instantiations are examined for modeling recursive structures. This report examines two example structures: a fanout tree of buffers and a fat tree interconnection network. For both structures, the recursive descriptions are easier to develop, and more clearly express the structure, making them easier to understand. The main difficulty in developing repetitive structures lies in devising a way of interconnecting the basic components comprising the structure. It is shown that the difficulties result from fundamental language design decisions made in VHDL, and that it is not appropriate to modify the language to avoid the difficulties. Hence, in general, the recursive style is preferred over the repetitive style for describing recursive hardware structures. 1 1. Introduction Many of the hardware structures that are designed ..

An experimental system for evaluating cache coherence protocols in shared memory multiprocessors / Peter John Ashenden.

Bibliography: leaves 240-246.xvi, 246 leaves : ill. ; 30 cm.This thesis examines cache coherence protocols designed for use in bus connected shared memory multiprocessors.Thesis (Ph.D.)--University of Adelaide, Dept. of Computer Science, 1997

Digital design (Verilog): an embedded systems approach using Verilog

Digital Design: An Embedded Systems Approach Using Verilog provides a foundation in digital design for students in computer engineering, electrical engineering and computer science courses. It takes an up-to-date and modern approach of presenting digital logic design as an activity in a larger systems design context. Rather than focus on aspects of digital design that have little relevance in a realistic design context, this book concentrates on modern and evolving knowledge and design skills. Hardware description language (HDL)-based design and verification is emphasized--Veri

Digital design (VHDL): an embedded systems approach using VHDL

Digital Design: An Embedded Systems Approach Using VHDL provides a foundation in digital design for students in computer engineering, electrical engineering and computer science courses. It takes an up-to-date and modern approach of presenting digital logic design as an activity in a larger systems design context. Rather than focus on aspects of digital design that have little relevance in a realistic design context, this book concentrates on modern and evolving knowledge and design skills. Hardware description language (HDL)-based design and verification is emphasized--VHDL ex

A Comparison of Alternative Extensions for Data Modeling in VHDL

A number of proposals for object-oriented extensions to VHDL deal with object-oriented extensions to support high-level modeling of data. They provide features for expressing data abstraction, encapsulation, and inheritance with polymorphism—features that are central to object oriented techniques. There are two approaches to object-oriented data modeling: class-based and programming by extension. This paper compares the two approaches in the context of hardware modeling in VHDL. It outlines the two approaches and presents examples illustrating how they might be included in VHDL. It discusses the issue of integration with signal semantics, and compares how the approaches deal with encapsulation, initialization of objects, and inheritance. The paper concludes that, while both approaches are viable, the programming by extension approach is preferred. 1