Testing a Quantum Computer

The problem of quantum test is formally addressed. The presented method attempts the quantum role of classical test generation and test set reduction methods known from standard binary and analog circuits. QuFault, the authors software package generates test plans for arbitrary quantum circuits using the very efficient simulator QuIDDPro[1]. The quantum fault table is introduced and mathematically formalized, and the test generation method explained.Comment: 15 pages, 17 equations, 27 tables, 8 figure

Effectiveness Assessment of the Search-Based Statistical Structural Testing

Search-based statistical structural testing (SBSST) is a promising technique that uses automated search to construct input distributions for statistical structural testing. It has been proved that a simple search algorithm, for example, the hill-climber is able to optimize an input distribution. However, due to the noisy fitness estimation of the minimum triggering probability among all cover elements (Tri-Low-Bound), the existing approach does not show a satisfactory efficiency. Constructing input distributions to satisfy the Tri-Low-Bound criterion requires an extensive computation time. Tri-Low-Bound is considered a strong criterion, and it is demonstrated to sustain a high fault-detecting ability. This article tries to answer the following question: if we use a relaxed constraint that significantly reduces the time consumption on search, can the optimized input distribution still be effective in fault-detecting ability? In this article, we propose a type of criterion called fairness-enhanced-sum-of-triggering-probability (p-L1-Max). The criterion utilizes the sum of triggering probabilities as the fitness value and leverages a parameter p to adjust the uniformness of test data generation. We conducted extensive experiments to compare the computation time and the fault-detecting ability between the two criteria. The result shows that the 1.0-L1-Max criterion has the highest efficiency, and it is more practical to use than the Tri-Low-Bound criterion. To measure a criterion’s fault-detecting ability, we introduce a definition of expected faults found in the effective test set size region. To measure the effective test set size region, we present a theoretical analysis of the expected faults found with respect to various test set sizes and use the uniform distribution as a baseline to derive the effective test set size region’s definition

An universal quantum computation scheme with low error diffusion property

Quantum concatenation code is an effective way to realize fault-tolerant universal quantum computing. Still, there are many non-fault-tolerant logical locations at its low encoding level, which thereby increases the probability of error multiplication and limits the ability that such code to realize a high-fidelity universal gate library. In this work, we propose a general framework based on machine learning technology for the decoder design of a segmented fault-tolerant quantum circuit. Then following this design principle, we adopt the neural network algorithm to give an optimized decoder for the such circuit. To assess the effectiveness of our new decoder, we apply it to the segmented fault-tolerant logical controlled-NOT gates, which act on the tensor composed of the Steane 7-qubit logical qubit and the Reed-Muller 15-qubit logical qubit. We simulate these gates under depolarizing noise environment and compare the gate error thresholds in contrast to the minimal-weight decoder. Finally, we provide a fault-tolerant universal gate library based on a 33-qubit non-uniform concatenated code. Furthermore, we offer several level-1 segmented fault-tolerant locations with optimized decoders to construct a non-Clifford gate on this code, which has less circuit depth than our existing work. Meanwhile, we analyze the pseudo-threshold of the universal scheme of this code.Comment: 21 pages,13 figure

Machine-learning Based Three-Qubit Gate for Realization of a Toffoli Gate with cQED-based Transmon Systems

We use machine learning techniques to design a 50 ns three-qubit flux-tunable controlled-controlled-phase gate with fidelity of \u3e99.99% for nearest-neighbor coupled transmons in circuit quantum electrodynamics architectures. We explain our gate design procedure where we enforce realistic constraints, and analyze the new gate’s robustness under decoherence, distortion, and random noise. Our controlled-controlled phase gate in combination with two single-qubit gates realizes a Toffoli gate which is widely used in quantum circuits, logic synthesis, quantum error correction, and quantum games

Fault Models for Quantum Mechanical Switching Networks

The difference between faults and errors is that, unlike faults, errors can be corrected using control codes. In classical test and verification one develops a test set separating a correct circuit from a circuit containing any considered fault. Classical faults are modelled at the logical level by fault models that act on classical states. The stuck fault model, thought of as a lead connected to a power rail or to a ground, is most typically considered. A classical test set complete for the stuck fault model propagates both binary basis states, 0 and 1, through all nodes in a network and is known to detect many physical faults. A classical test set complete for the stuck fault model allows all circuit nodes to be completely tested and verifies the function of many gates. It is natural to ask if one may adapt any of the known classical methods to test quantum circuits. Of course, classical fault models do not capture all the logical failures found in quantum circuits. The first obstacle faced when using methods from classical test is developing a set of realistic quantum-logical fault models. Developing fault models to abstract the test problem away from the device level motivated our study. Several results are established. First, we describe typical modes of failure present in the physical design of quantum circuits. From this we develop fault models for quantum binary circuits that enable testing at the logical level. The application of these fault models is shown by adapting the classical test set generation technique known as constructing a fault table to generate quantum test sets. A test set developed using this method is shown to detect each of the considered faults.Comment: (almost) Forgotten rewrite from 200

Inverse Problems, Constraint Satisfaction, Reversible Logic, Invertible Logic and Grover Quantum Oracles for Practical Problems

It is well-known that the “Unsorted Database” quantum algorithm by Grover gives quadratic speedup to several practically important combinatorial and enumerative problems, such as: SAT, Graph Coloring, Maximum Cliques, Traveling Salesman and many others. Recently, quantum programming languages such as QISKIT, QSHARP or Quipper start to be used to design, verify and simulate practical quantum algorithms for important problems in Quantum Machine Learning or optimization. So far, however, no methodologies have been created to program Grover\u27s Oracles for particular classes of problems. In contrast, such methodologies have been already created for classical Constraint Satisfaction Problems (CSP). Invertible Logic was recently introduced by Supriyo Datta and his team. The goal of this paper is to present results of our research towards creating a systematic methodology to solve search problems in Artificial Intelligence, Logic Design and Machine Learning by repeated applications of modified hardware oracles. These oracles can use: (1) classical Boolean logic, (2) quantum logic, or (3) invertible logic. Our methodology to design and exercise all types of general oracles is based on bottom-up synthesis and technology transformations. For CSP problems we apply unified blocks which use various data representations and encodings

Using Homing, Synchronizing and Distinguishing Input Sequences for the Analysis of Reversible Finite State Machines

A digital device is called reversible if it realizes a reversible mapping, i.e., the one for which there exist a unique inverse. The field of reversible computing is devoted to studying all aspects of using and designing reversible devices. During last 15 years this field has been developing very intensively due to its applications in quantum computing, nanotechnology and reducing power consumption of digital devices. We present an analysis of the Reversible Finite State Machines (RFSM) with respect to three well known sequences used in the testability analysis of the classical Finite State Machines (FSM). The homing, distinguishing and synchronizing sequences are applied to two types of reversible FSMs: the converging FSM (CRFSM) and the nonconverging FSM (NCRFSM) and the effect is studied and analyzed. We show that while only certain classical FSMs possess all three sequences, CRFSMs and NCRFSMs have properties allowing to directly determine what type of sequences these machines possess