Visible light emission from reverse-biased silicon nanometer-scale diode-antifuses

Silicon nanometer-scale diodes have been fabricated to emit light in the visible range at low power consumption. Such structures are candidates for emitter elements in Si-based optical interconnect schemes. Spectral measurements of Electroluminescence (EL) on the reverse-biased nanometer-scale diodes brought into breakdown have been carried out over the photon energy range of 1.4-2.8 eV. Previously proposed mechanisms for avalanche emission from conventional silicon p-n junctions are discussed in order to understand the origin of the emission. Also the stability of the diodes has been tested. Results indicate that our nanometer-scale diodes are basically high quality devices. Furthermore due to the nanometer-scale dimensions, very high electrical fields and current densities are possible at low power consumption. This makes these diodes an excellent candidate to be utilized as a light source in Si-based sensors and actuator application

Room temperature SiO2 films deposited by multipolar ECR PECVD

The demand for high mobility TFTs realised on temperature unstable substrates is increasing. These devices require thin, low-temperature, high-quality gate dielectrics. It is known however, that a low deposition temperature degrades the films properties. In this work, we report that films comparable to thermally grown oxide can be deposited at room temperature, with a modified electron cyclotron resonance (ECR) plasma source, called multipolar ECR. SiO2 films with interface charge in the order of 1011 ions/cm2, critical field of 6 MV/cm and refiactive index of 1.46 were obtained for optimal deposition conditions. The effects of total pressure and microwave power on material properties were studied. The electrical behaviour of the SiO2 layers was explained in terms of film structure and deposition parameters

Soft breakdown triggers for large area capacitors under constant voltage stress

\u3cp\u3eThis work quantitatively compares breakdown triggers for constant voltage stress of large area NMOS capacitors (up to 10 mm\u3csup\u3e2\u3c/sup\u3e) with 1.8 to 12 nm gate oxide thickness (with negative V\u3csub\u3eG\u3c/sub\u3e). We conclude that in the studied range, breakdown is identified more reliably with a current step trigger than through increased current fluctuation (RMS). We also present data filtering algorithms that significantly enhance the ratio between the breakdown signal and background noise level.\u3c/p\u3

Comparison of soft-breakdown triggers for large-area capacitors under constant voltage stress

\u3cp\u3eThis work quantitatively compares soft breakdown identification methods for constant: voltage stress of large-area nMOS capacitors (up to 10 mm\u3csup\u3e2\u3c/sup\u3e) with 1.8- to 12-nm gate-oxide thickness with negative gate voltage. We conclude that in the studied range, breakdown is identified more reliably with a current step trigger than through increased current fluctuation. We present a method to quantify the system background noise, and show results of data filtering algorithms that significantly enhance the ratio between the breakdown signal and background noise level. Index Terms-CMOS, reliability, soft breakdown, TDDB.\u3c/p\u3