Pixel resistance optimization of a Si0.5Ge0.5/Si MQWs thermistor based on in-situ B doping for microbolometer applications

The state-of-the-art microbolometers are mainly based on polycrystalline or amorphous materials, typically Vanadium oxide (VOx) or amorphous-Silicon (a-Si), which only have modest temperature sensitivities and noise characteristics. The properties of single crystalline SiGe/Si multi quantum wells (MQWs) have been proposed as a promising material1. Particularly, SiGe/Si MQWs structure with high Ge concentration is expected to provide very high temperature coefficient of resistance (TCR) values between 6 to 8% 2. Although SiGe/Si MQWs structure as a thermistor material is extremely promising, difficulty of defect free deposition and high sheet resistance of high Ge concentrated SiGe layers are the two main bottlenecks of this approach. In this work, a very high TCR of -5.5 %/K is achieved for SiGe/Si MQWs including 50% Ge with an acceptable noise value of 2.7 × 10-13 V2/Hz at 10 Hz. The initial pixel resistance of 3 period of SiGe/Si MQWs with 50% Ge concentration is measured as 21 MΩ, which might not be compatible with the ROIC design. By the optimization of insitu Boron (B) doping level in SiGe layers of the MQW stack, 210 kΩ for 25 x 25 μm2 pixel size is achieved. The optimized B doping density of ∼1 × 1018 cm-3 in SiGe wells did not cause any significant change in the TCR value whereas the 1/f noise performance is even enhanced due to the in-situ doping process and measured as 2.9 × 10-14 V2/Hz at 10 Hz

Through-Silicon Via process module with backside metallization and redistribution layer within a 130 nm SiGe BiCMOS technology

The development of a Through-Silicon Via process module within a high performance SiGe BiCMOS technology is demonstrated. The TSV technology module including both the TSV fabrication process itself, the temporary wafer bonding for BiCMOS thin wafer handling and the thin wafer backside processing is developed on 8-inch wafer level and the optimization of the different process steps are explained. This process module is fully compatible with the qualified SiGe BiCMOS technology environment which enables very uniform and reliable TSV backside fabrication adding new functionalities into IHPs high performance SiGe BiCMOS technologies applicable for thin wafer applications and 3D heterogeneous integration

Si1-xGex/Si MQW based uncooled microbolometer development and integration into 130 nm BiCMOS technology

In this paper, the recent progress on Sii-xGeVSi based high performance detector structures is presented. The process optimization of the detector by means of high TCR, low 1/f noise and appropriate resistance is summarized. The method of integrating the developed Sii-xGex/Si multi quantum well (MQW) detector structures into a 130 nm BiCMOS process is provided. The optimization studies required for the full integration of the suspended uncooled microbolometer device are presented

High performance thermistor based on Si1-xGex/Si multi quantum wells

This letter represents a prototype of an intrinsic thermistor based on silicon-germanium/silicon (Si1-xGex/Si) multi quantum wells with varying Ge concentration in SiGe wells. Experimental results of the thermistor prototype are provided in terms of temperature coefficient of resistance (TCR) and noise constant (K-1/f). The prototype with 50% Ge in SiGe wells exhibited an outstanding TCR of -5.5 %/K accompanied by a K-1/f of 5.8 x 10(-13) for 25 mu m x 25 mu m and 3.4 x 10(-15) for 200 mu m x 200 mu m pixel size, showing the concurrent achievement of a very high TCR and a low 1/f noise performance