Outils pour l'exploration d'architectures programmables embarquées dans le cadre d'applications industrielles (Tools for exploration of embedded programmable architectures in industrial applications)

Emerging applications like mobile phones, digital video or videophones require powerful computing as well as good flexibility in order to track the evolving standards. The integration of such systems in one single chip often involves dedicated processors, with design constraints on performance, area cost and power consumption. This thesis deals with the co-design of a dedicated processor and its embedded software. The main goal is to reduce the development time of the processor-software pair, concentrating on two complementary issues : the high-level functional validation of software in its real environment and the processor architecture exploration by means of its instruction-set. Functional high-level validation in real environment involves the co-simulation of the application software written in C with the rest of the hardware, described in VHDL. This co-simulation is performed without the need of a simulation model of the processor, unlike the classical approach using instruction-set level co-simulation. Starting from an existing communication model, a C-VHDL co-simulation environment is developed in order to fulfil requirements from the industrial design of a complex system, a videophone terminal. Processor architecture exploration is obtained by the automatic reconfiguration of a retargetable compiler. Based on statistics from a number of variations around an original DSP architecture, an optimised solution in terms of code size is identified. A restricted set of critical criteria including register sets size and configuration is selected. An alternative approach based on the estimation of pre-compiled assembly code is experienced, concentrating on a peculiar issue in instruction-set design, the constant fields encoding. An interactive tool for instruction-set refinement is proposed.Les applications complexes comme la téléphonie mobile, la télévision numérique ou la visiophonie exigent une grande puissance de calcul, mais aussi une flexibilité accrue afin de suivre l'évolution des standards. L'intégration de tels systèmes sur une seule puce requiert l'embarcation de processeurs devant respecter des contraintes de performances, de coût en surface et de faible consommation. Leur conception en un temps réduit met en oeuvre des compilateurs rapidement reciblables, ainsi que de nouveaux outils d'aide à la conception. Ceux-­ci sont nécesssaire pour suivre le cycle de vie de tels processeurs, composé d'étapes de réduction de coût et de réutilisation. Cette thèse présente plusieurs techniques visant à réduire le temps de développement du couple logiciel­processeur embarqué, à savoir la validation fonctionnelle à haut­niveau et l'aide au raffinement de l'architecture et du jeu d'instructions. La validation de la description haut­niveau du logiciel embarqué est assurée dans son en­ vironnement matériel réel grâce à la co­simulation C­VHDL, développée durant cette thèse. La mise au point du logiciel est alors facilitée par l'utilisation d'outils de développement standard, et par la faculté à simuler le système complet sur un large intervalle de temps. L'aide au raffinement d'architecture est assurée par la re­configuration automatique d'un compilateur reciblable, afin d'explorer un grand nombre de solutions en un temps réduit. L'analyse de codes applicatifs typiques ainsi compilés permet d'isoler les configurations architecturales performantes. De plus, un outil d'estimation se concentrant sur l'encodage des champs constants dans le le jeu d'instructions est proposé

Automatic VHDL-C Interface Generation for Distributed Cosimulation: Application to Large Design Examples

For functional validation of heterogeneous embedded systems, hardware/software (Hw/Sw) cosimulation methodology is mandatory. This paper deals with a distributed cosimulation environment for heterogeneous systems prototyping. The cosimulation environment allows handling all kinds of distributed architectures regardless the communication scheme used, cosimulation at different levels of abstraction and smooth transition to the cosynthesis process. The approach can handle any number of hardware modules, software modules, and debugging tools, which can be used simultaneously. This flexibility is obtained thanks to an automatic cosimulation interface generation tool, which creates links between Hw and Sw simulation environments. The resulting environment is very easy to use and our cosimulation model has been validated on very large industrial examples. The experiments show that VHDL-C cosimulation is faster than classical simulation approaches

Automatic generation of interfaces for distributed C-VHDL cosimulation of embedded systems: an industrial experience

International audienceThis paper presents a distributed hardware/software cosimulation environment for heterogeneous systems prototyping applied to an industrial application. The environment provides following features: distributed Hw/Sw cosimulation, automatic Hw/Sw interface generation, Hw elements can be described at different levels of abstraction and generic/specific Sw debuggers can be used. Starting from a brief description of the interface of the interconnected modules the tool automatically produces the link between Hw and Sw parts. In addition, the environment is very easy to use, even for complex systems that may include several Sw (C) modules and several Hw (VHDL) modules running in parallel. Applied to a large industrial multi-processor system, this method appeared reliable and efficient, providing important benefits in hardware-software codesign: better design environment and reduced time to validate

Co-simulation C-VHDL pour la validation fonctionnel de logiciel embarqué

International audienceRecent sub-micron circuit integration technologies enabled the gathering on only one chip of the whole set of components of complex systems. In addition, flexibility requirements force us to increase the programmability of these components, which makes the embedding of processors inevitable. Associated with these processors, the embedded software needs a particular design flow, focuses on a deepened validation before realization of the system. This article present an approach based on C-VHDL co-simulation, making it possible to validate the functionality of the software embedded in its real hardware environment without requiring a processor model. The relevant use of this method in the industrial production of a complex videophone system shows the utility of the co-simulation

C-VHDL co-simulation for functional validation of embedded software

Recent sub-micron circuit integration technologies enabled the gathering on only one chip of the whole set of components of complex systems. In addition, flexibility requirements force us to increase the programmability of these components, which makes the embedding of processors inevitable. Associated with these processors, the embedded software needs a particular design flow, focuses on a deepened validation before realization of the system. This article present an approach based on C-VHDL co-simulation making it possible to validate the functionality of the software embedded in its real hardware environment, without requiring a processor model. The relevant use of this method in the industrial production of a complex videophone system shows the utility of the co-simulation

Automatic generation of VHDL-C interfaces for distributed cosimulation

International audienceThis paper deals with distributed cosimulation for heterogeneous systems prototyping. Our VHDL/C cosimulation environment allows to handle all kinds of distributed architectures, any number of hardware or software modules, cosimulation at different abstraction levels and several cosimulation scenarious. This flexibility is obtained thanks to an automatic cosimulation interface generation tool able to create the link between Hw and Sw simulation environments. The advantages of our cosimulation methodology and more precisely the automatic cosimulation interface generation tool will be described by examples

System-on-a-Chip Cosimulation and Compilation

Complex consumer products with multiple functions on a single chip demand new design and verification methods for interfunctioning hardware and software components. The authors' new techniques address this need

Trends in embedded systems technology: an industrial perspective

International audienceWhile there has been much talk on the necessity of a major breakthrough in design methods and advanced CAD to support the multi-million gate chips that are already a reality, there has not been a clearly identified new direction which will produce a major productivity breakthrough. This paper attempts to identify one of these productivity breakthroughs, through: an analysis of designer needs, a study of embedded systems trends in the industry, case studies in wireless communications and multi-media