Toward optimized code generation through model-based optimization

International audienceModel-Based Development (MBD) provides an additional level of abstraction, the model, which lets engineers focus on the business aspect of the developed system. MBD permits automatic treatments of these models with dedicated tools like synthesis of system's application by automatic code generation. Real-Time and Embedded Systems (RTES) are often constrained by their environment and/or the resources they own in terms of memory, energy consumption with respect to performance requirements. Hence, an important problem to deal with in RTES development is linked to the optimization of their software part. Although automatic code generation and the use of optimizing compilers bring some answers to application optimization issue, we will show in this paper that optimization results may be enhanced by adding a new level of optimizations in the modeling process. Our arguments are illustrated with examples of the Unified Modeling Language (UML) state machines diagrams which are widely used for control aspect modeling of RTES. The well-known Gnu Compiler Collection (GCC) is used for this study. The paper concludes on a proposal of two step optimization approach that allows reusing as they are, existing compiler optimizations

An Approach for Efficient Neural Architecture Search Space Definition

As we advance in the fast-growing era of Machine Learning, various new and more complex neural architectures are arising to tackle problem more efficiently. On the one hand their efficient usage requires advanced knowledge and expertise, which is most of the time difficult to find on the labor market. On the other hand, searching for an optimized neural architecture is a time-consuming task when it is performed manually using a trial and error approach. Hence, a method and a tool support is needed to assist users of neural architectures, leading to an eagerness in the field of Automatic Machine Learning (AutoML). When it comes to Deep Learning, an important part of AutoML is the Neural Architecture Search (NAS). In this paper, we propose a novel cell-based hierarchical search space, easy to comprehend and manipulate. The objectives of the proposed approach are to optimize the search-time and to be general enough to handle most of state of the art Convolutional Neural Networks (CNN) architectures.Comment: AAAI-22 Workshop: Learning Network Architecture During Training, Feb 2022, Online, United State

Does Code Generation Promote or Prevent Optimizations?

International audienceThis paper addresses the problem of code optimization for Real-Time and Embedded Systems (RTES). Such systems are designed using Model-Based Development (MBD)approach that consists of performing three major steps: building models, generating code from them and compiling the generated code. Actually, during the code generation, an important part of the modeling language semantics which could be useful for optimization is lost, thus, making impossible some optimizations achievement. This paper shows how adding a new level of optimization at the model level results in a more compact code. It also discusses the impact of the code generation on optimization: whether this step promotes or prevents optimizations. We conclude on a proposal of a new MBD approach containing only steps that advance optimization: modeling and compiling steps

MedSecurance Project: advanced security-for-safety assurance for medical device IoT (IoMT)

The MedSecurance project focus on identifying new challenges in cyber security with focus on hardware and software medical devices in the context of emerging healthcare architectures. In addition, the project will review best practice and identify gaps in the guidance, particularly the guidance stipulated by the medical device regulation and directives. Finally, the project will develop comprehensive methodology and tooling for the engineering of trustworthy networks of inter-operating medical devices, that shall have security-for-safety by design, with a strategy for device certification and certifiable dynamic network composition, ensuring that patient safety is safeguarded from malicious cyber actors and technology “accidents”.This work is co-funded by the HORIZON.2.1 - Health Programme of the European Commission, Grant Agreement number: 101095448 - Advanced Security-for-safety Assurance for Medical Device IoT (MEDSECURANCE).Peer ReviewedArticle signat per 29 autors/es: Parisis GALLOS (a), Rance DeLONG (b), Nicholas MATRAGKAS (c), Allan BLANCHARD (c), Chokri MRAIDHA (c), Gregory EPIPHANIOU (d), Carsten MAPLE (d), Konstantinos KATZIS (e), Jaime DELGADO (f), Silvia LLORENTE (f), Pedro MALÓ (g), Bruno ALMEIDA (g), Andreas MENYCHTAS (h), Christos PANAGOPOULOS (h), Ilias MAGLOGIANNIS (h), Petros PAPACHRISTOU (i), Mariana SOARES (j), Paula BREIA (j), Ana Cristina VIDAL (j), Martin RATZ (k), Ross WILLIAMSON (k), Eduard ERWEE (k), Lukasz STASIAK (k), Orfeu FLORES (l), Carla CLEMENTE (l), John MANTAS (a), Patrick WEBER (a), Theodoros N. ARVANITIS (m) and Scott HANSEN (b) // (a) European Federation of Medical Informatics, Switzerland; (b) The Open Group, UK; (c) CEA, List, Université Paris-Saclay, France; (d) University of Warwick, UK; (e) European University Cyprus, Cyprus; (f) Universitat Politecnica de Catalunya, Spain; (g) Unparallel Innovation, Portugal; (h) BioAssist S.A., Greece; (i) HYGEIA Medical Group, Greece; (j) Centro Garcia de Orta, Hospital Garcia de Orta, Portugal; (k) Doccla AB, Sweden; (l) STAB VIDA, Portugal m University of Birmingham, UKObjectius de Desenvolupament Sostenible::3 - Salut i BenestarPostprint (published version

Modélisation exécutable et analyse de propriétés temps réel

Le développement dirigé par les modèles est une voie prometteuse pour la gestion de la complexité croissante des systèmes, notamment ceux du domaine temps réel embarqué. Ce type de systèmes présente une complexité supplémentaire liée aux aspects non fonctionnels telles que les contraintes de temps ou d'embarquabilité. L'analyse du respect de ces contraintes représente une phase tout aussi primordiale de leur développement que leur conception à proprement parler. Afin de bénéficier au mieux d'un procesus de développement dirigé par les modèles, il convient d'utiliser le modèle sur tout le cycle de développement et notamment sur les phases d'analyse des contraintes non fonctionnelles. Pour ce faire, il est nécessaire de construire un modèle exécutable c'est-à-dire un modèle que l'on peut transformer de manière automatique en un modèle exécutable par une machine de Turing. Ce modèle doit répondre à des critères spécifique de complétude en fonction de l'analyse à effectuer. Dans le domaine du temps réel, il est également primordial que les modèles répondent au critère de déterminisme défini ici comme l'exécution d'un même modèle produisant toujours le même résultat dans les mêmes conditions initiales. Le travail de cette thèse propose une approche de modélisation exécutable et déterministe de systèmes temps réel s'appuyant sur le langage normé UML. On définit ainsi un sous-ensemble sémantiquement déterministe du langage et on le complète par la définition d'une syntaxe concrète (le langage Accord-AL) associé à la syntaxe abstraite d'Actions du standard. Ce cadre de modélisation est alors utilisé pour produire des modèles exécutables et déterministes d'applications temps réel embarquées. La mise en oeuvre de processus d'analyse sur ces modèels nous a montré qu'ils ne sont pas à eux seuls suffisants à la production de résultats suffisamment précis pour être exploitables. En effet, l'obtention de résultats d'analyse précis passe par la prise en compte d'une part du modèle d'exécution sous-jacent, et d'autre part de la plate-forme d'exécution. Nous prenons alors en compte le modèle d'exécution en explicitant la sémantique d'exécution de notre approche de modélisation exécutable en faisant usage de l'infrastructure de UML pour la description structurelle et de notre langage Accord-AL pour la description comportementale. Enfin, nous affinons notre processus d'analyse par l'intégration dans notre approche d'éléments de modélisation de la plate-forme d'exécution. Composé avec le modèle exécutable de l'application, le modèle d'exécution et le modèle de la plate-forme d'exécution contribuent à la production de résutltats d'analyse plus précis. Ce principe est illustré par la mise en oeurvre d'une approche de synthèse automatique de modèle d'analyse de WCET.EVRY-BU (912282101) / SudocSudocFranceF

Analyzing Throughput for Cyber-Physical Systems modeled with Synchronous Dataflow

International audienceCyber-Physical System (CPS) is a critical system in which timing performance is often required. Throughput is a performance indicator of interest when designing a CPS. Analyzing throughput reachable by a CPS at design-time implies to optimize the behaviour of the system in such a way that it may run with an optimal frequency. This can be achieved by using synchronous dataflow graphs (SDFGs) which is a formal model of computation that fosters the analysis of systems where performance is always prominent. In this paper, we discuss on the throughput estimation for CPS applications modeled with the SDFGs. In order to evaluate the optimal throughput reachable by a CPS application, we use SDFGs to describe computations and communications in the CPS application and we propose a mathematical formulation of scheduling and mapping decisions in order to deploy the behavioural model of the CPS onto a platform, which essentially consists of heterogeneous and distributed resources

From user stories to models: A machine learning empowered automation

International audienceIn modern software development, manually deriving architecture models from software requirements expressed in natural language becomes a tedious and time-consuming task particularly for more complex systems. Moreover, the increase in size of the developed systems raises the need to decompose the software system into subsystems at early stages since such decomposition aids to better design the system architecture. In this paper, we propose a machine learning based approach to automatically breakdown the system into subsystems and generate preliminary architecture models from natural language user stories in the Scrum process. Our approach consists of three pillars. Firstly, we compute word level similarity of requirements using word2vec as a prediction model. Secondly, we extend it to the requirement level similarity computation, using a scoring formula. Thirdly, we employ the Hierarchical Agglomerative Clustering algorithm to group the semantically similar requirements and provide an early decomposition of the system. Finally, we implement a set of specific Natural Language Processing heuristics in order to extract relevant elements that are needed to build models from the identified clusters. Ultimately, we illustrate our approach by the generation of subsystems expressed as UML use-case models and demonstrate its applicability using three case studies

Estimating latency for synchronous dataflow graphs using periodic schedules

13th International Conference on Verification and Evaluation of Computer and Communication SystemsVECoS 2019: , ç ocotober 2019, Porto, PortugalInternational audienceSynchronous Dataflow Graph (SDFG) is a formal tool widely used to model and analyze the behaviour of systems constrained by timing requirements. It has been successfully used in digital signal processing and manufacturing fields to specify and analyze the performance of embedded and distributed applications. Various performance indicators such as throughput, latency or memory consumption can be evaluated with SDFGs. This paper tackles the latency analysis for SDFG using periodic schedules

Cyclic scheduling of loop-intensive applications on heterogeneous multiprocessor architectures

International audienceThis paper tackles the scheduling of loop-intensive applications modeled by synchronous dataflow graphs (SDFGs) on heterogeneous multiprocessor architectures under resource and communication constraints. Scheduling an application graph on multiprocessor architectures under resource constraints is a well-known NP•hard problem widely addressed in the previous decades with the goal of optimizing different performance metrics such as latency, memory allocations, energy consumption, throughput, etc. In this paper, we focus on the study of cyclic scheduling strategies and specifically the software pipelined schedules of SDFGs under the resource and communication constraints of heterogeneous multiprocessor architectures and we made two major contributions. The first contribution is an integer linear programming (ILP) model for the exact resolution of the scheduling problem and the second contribution is a time-efficient heuristic that generates scheduling solutions close to the optimal solutions generated with our ILP model. Index Tenns-Cyclic scheduling, software pipelining, synchronous dataflow graphs, heterogeneous multiprocessor architectures, throughput, cyber-physical systems

A modular interoperability layer for connecting the business and manufacturing systems

International audienceA current challenge in the manufacturing area aims at connecting the business systems with the manufacturing equipment (production devices and machine-tools) to match effectively the production with the individual customers demands. However, with the heterogeneity of industrial communication and information technologies, the interoperability of business systems and manufacturing equipment still remains complex to be achieved. This paper deals with the interoperability of business and manufacturing systems by proposing a modular layer that uses a model-based approach to transport the production information (production orders, workflow, resources capabilities, etc.) from business systems down to manufacturing equipment