4 research outputs found

    Copper(II) and lead(II) complexation by humic acid and humic-like ligands

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    The stability of metal–humate complexes is an important factor determining and predicting speciation, mobility and bioavailability of heavy metals in the environment. A comparative investigation of the complexation of Cu(II) and Pb(II) with humic acid and humic-like ligands, such as benzoic and salicylic acid, was performed. The analysis was realized at pH 4.0, a temperature of 25 °C and at an ionic strength of 0.01 mol dm-3 (NaCl) using the Schubert ion-exchange method and its modified form. The stability constants were calculated from the experimental data by the Schubert method for complexes with benzoic and humic acid. A modified Schubert method was used for the determination of the stability constants of the complexes with salicylic acid. It was found that Cu(II) and Pb(II) form mononuclear complexes with benzoic and humic acid while with salicylic acid both metals form polynuclear complexes. The results indicate that Pb(II) has a higher binding ability than Cu(II) to all the investigated ligands. The Cu(II)–salicylate and Pb(II)–salicylate complexes showed noticeable higher stability constants compared with their complexes with humic acid, while the stabilities of the complexes with benzoic acid differed less. Salicylic and benzoic acids as humic-like ligands can be used for setting the range of stability constants of humic complexes with Cu(II) and Pb(II)

    A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI

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    46th European Solid-State Circuits Conference (ESSCIRC), Lausanne, SWITZERLAND, SEP 13-15, 2016International audienceThis paper presents a RISC-V system-on-chip (SoC) with integrated voltage regulation, adaptive clocking, and power management implemented in a 28 nm fully depleted silicon-on-insulator process. A fully integrated simultaneous-switching switched-capacitor DC-DC converter supplies an application core using a clock from a free-running adaptive clock generator, achieving high system conversion efficiency (82%-89%) and energy efficiency (41.8 double-precision GFLOPS/W) while delivering up to 231 mW of power. A second core serves as an integrated power-management unit that can measure system state and actuate changes to core voltage and frequency, allowing the implementation of a wide variety of power-management algorithms that can respond at submicrosecond timescales while adding just 2.0% area overhead. A voltage dithering program allows operation across a wide continuous voltage range (0.45 V-1 V), while an adaptive voltage-scaling algorithm reduces the energy consumption of a synthetic benchmark by 39.8% with negligible performance penalty, demonstrating practical microsecond-scale power management for mobile SoCs

    A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI

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    This work demonstrates a RISC-V vector microproces-sor implemented in 28nm FDSOI with fully-integrated non-interleaved switched-capacitor DCDC (SC-DCDC) converters and adaptive clocking that generates four on-chip voltages between 0.5V and 1V using only 1.0V core and 1.8V IO voltage inputs. The design pushes the capabilities of dynamic voltage scaling by enabling fast transitions (20ns), simple packaging (no off-chip passives), low area overhead (16%), high conversion efficiency (80-86%), and high energy effi-ciency (26.2 DP GFLOPS/W) for mobile devices
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