Solution-Processed Bootstrapped Organic Inverters Based on P3HT With a High-k Gate Dielectric Material

In this letter, the integration of a high-k gate dielectric has been demonstrated for achieving low-operating-voltage organic field-effect transistors (OFETs) and circuits based on solution-processed poly(3-hexylthiophene) (P3HT). We have successfully demonstrated all-p-type organic circuits based on P3HT operating at below 4 V supply voltage. The switching behavior is improved by using the bootstrapping technique, with the boot-strapped inverter showing good results with a dc gain (A(v)) of -1.7 and V(OH) and V(OL) values of 3.3 and 0.35 V, respectively. The output swing of the bootstrapped inverter is improved by about 40% when compared to that of simple all-p-type inverters, as demonstrated by using experimental characterizations

Organic FETs with HWCVD silicon nitride as a passivation layer and gate dielectric

This paper reports the use of hot-wire chemical vapour deposited (HWCVD) Silicon nitride as a passivation layer for Organic Field Effect Transistors (OFETs). Firstly, the degradation study of the OFETs is done with time. A thin (10-20 nm) layer of silicon nitride is deposited on the OFETs, at a low temperature (<90 degrees C) by HWCVD process, to passivate them from the ambient. Our results show that this technique is very effective in improving the stability of the organic semiconductors (Poly-3-hexyl thiophene (P3HT) is used as a test case in this study). This HWCVD deposited nitride can also be used as a gate dielectric material for the study of OFETs because of its higher dielectric constant and significantly less hydrogen content. (c) 2007 Elsevier B.V. All rights reserved

DC & transient circuit simulation methodologies for organic electronics

This work establishes a novel circuit simulation methodology for organic thin film transistors (OTFTs). Because of a lack of well developed physical models for OTFTs and due to the limitations of conventional parameter extraction techniques, the approaches presented in this work come in handy for circuit designers. The first approach uses a Look-up Table (LUT) model, which is implemented in a general purpose public-domain circuit simulator SEQUEL (Solver for circuit EQuations with User-defined Elements). In the second approach, circuit simulation is performed using equivalent SPICE parameters, which are extracted using a global optimization technique namely particle swarm optimization (PSO) algorithm. A good match has been observed between LUT simulations and SPICE based circuit simulations for both DC and transient cases

A simple and direct method for interface characterization of OFETs

Multi-frequency transconductance technique is successfully applied in this work for the first time for interface characterization of OFETs. Standard charge pumping measurements are used on silicon MOSFETs for the validation of MFT technique. The method is implemented on pentacene as well as the P3HT based OFETs with SiO2 as the gate dielectric. Our results show interface state densities in the range of 1012/cm2/eV for both the samples. The P3HT films are also shown to have additional trap centres which respond to frequencies above 100 kHz. Our results therefore clearly indicate that the MFT technique is indeed a highly useful technique for interface characterization of OFETs.© IEE