Digital-analog hybrid matrix multiplication processor for optical neural networks

The computational demands of modern AI have spurred interest in optical neural networks (ONNs) which offer the potential benefits of increased speed and lower power consumption. However, current ONNs face various challenges,most significantly a limited calculation precision (typically around 4 bits) and the requirement for high-resolution signal format converters (digital-to-analogue conversions (DACs) and analogue-to-digital conversions (ADCs)). These challenges are inherent to their analog computing nature and pose significant obstacles in practical implementation. Here, we propose a digital-analog hybrid optical computing architecture for ONNs, which utilizes digital optical inputs in the form of binary words. By introducing the logic levels and decisions based on thresholding, the calculation precision can be significantly enhanced. The DACs for input data can be removed and the resolution of the ADCs can be greatly reduced. This can increase the operating speed at a high calculation precision and facilitate the compatibility with microelectronics. To validate our approach, we have fabricated a proof-of-concept photonic chip and built up a hybrid optical processor (HOP) system for neural network applications. We have demonstrated an unprecedented 16-bit calculation precision for high-definition image processing, with a pixel error rate (PER) as low as $1.8\times10^{-3}$ at an signal-to-noise ratio (SNR) of 18.2 dB. We have also implemented a convolutional neural network for handwritten digit recognition that shows the same accuracy as the one achieved by a desktop computer. The concept of the digital-analog hybrid optical computing architecture offers a methodology that could potentially be applied to various ONN implementations and may intrigue new research into efficient and accurate domain-specific optical computing architectures for neural networks

Bidirectional high sidelobe suppression silicon optical phased array

An optical phased array (OPA), the most promising non-mechanical beam steering technique, has great potential for solid-state light detection and ranging systems, holographic imaging, and free-space optical communications. A high quality beam with low sidelobes is crucial for long-distance free-space transmission and detection. However, most previously reported OPAs suffer from high sidelobe levels, and few efforts are devoted to reducing sidelobe levels in both azimuthal (φ) and polar (θ) directions. To solve this issue, we propose a Y-splitter-assisted cascaded coupling scheme to realize Gaussian power distribution in the azimuthal direction, which overcomes the bottleneck in the conventional cascaded coupling scheme and significantly increases the sidelobe suppression ratio (SLSR) in the φ direction from 20 to 66 dB in theory for a 120-channel OPA. Moreover, we designed an apodized grating emitter to realize Gaussian power distribution in the polar direction to increase the SLSR. Based on both designs, we experimentally demonstrated a 120-channel OPA with dual-Gaussian power distribution in both φ and θ directions. The SLSRs in φ and θ directions are measured to be 15.1 dB and 25 dB, respectively. Furthermore, we steer the beam to the maximum field of view of 25° × 13.2° with a periodic 2λ pitch (3.1 μm). The maximum total power consumption is only 0.332 W with a thermo-optic efficiency of 2.7 mW∕π

Energy-efficient Silicon Optical Phased Array with Ultra-sparse Nonuniform Spacing

We experimentally demonstrate an ultra-sparse 120-channel silicon optical phased array with a large aperture size of 6 mm × 5 mm. A 162° field of view was achieved with a total power consumption of 0.47 W and thermo-optic power efficiency of 3.1 mW/π

Energy-efficient integrated silicon optical phased array

Abstract An optical phased array (OPA) is a promising non-mechanical technique for beam steering in solid-state light detection and ranging systems. The performance of the OPA largely depends on the phase shifter, which affects power consumption, insertion loss, modulation speed, and footprint. However, for a thermo-optic phase shifter, achieving good performance in all aspects is challenging due to trade-offs among these aspects. In this work, we propose and demonstrate two types of energy-efficient optical phase shifters that overcome these trade-offs and achieve a well-balanced performance in all aspects. Additionally, the proposed round-spiral phase shifter is robust in fabrication and fully compatible with deep ultraviolet (DUV) processes, making it an ideal building block for large-scale photonic integrated circuits (PICs). Using the high-performance phase shifter, we propose a periodic OPA with low power consumption, whose maximum electric power consumption within the field of view is only 0.33 W. Moreover, we designed Gaussian power distribution in both the azimuthal ( $$\varphi$$ φ ) and polar ( $$\theta$$ θ ) directions and experimentally achieved a large sidelobe suppression ratio of 15.1 and 25 dB, respectively. Graphical Abstrac

Light-Triggered Theranostics Based on Photosensitizer-Conjugated Carbon Dots for Simultaneous Enhanced-Fluorescence Imaging and Photodynamic Therapy

National Key Basic Research Program (973 Project) [2010CB933901, 2011CB933100]; National Natural Scientific Fund [51102258, 20803040, 81028009, 31170961]; New Century Excellent Talent of Ministry of Education of China [NCET-08-0350]; Shanghai Science and Technology Fund [1052nm04100]; Ministry of Educatio

Up to 170Gbaud optical interconnects with integrated CMOS-silicon photonics transmitter

We investigate the performance boundary of integrated CMOS silicon photonics transmitters with DSP techniques. 170Gbaud OOK generation and 120Gbaud 20km transmission is achieved with a CMOS-silicon transmitter, where the driver amplifier only consumes 158mW. </p