77 research outputs found

    DITTANY: Strength-Based Dynamic Information Flow Analysis Tool for x86 Binaries

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    International audienceDynamic dependence analysis monitors information flow between instructions in a program at runtime. Strengthbased dynamic dependence analysis quantifies the strength of each dependence chain by a measure computed based on the values induced at the source and target of the chain. To the best of our knowledge, there is currently no tool available that implements strength-based dynamic information flow analysis for x86. This paper presents DITTANY, tool support for strength-based dynamic dependence analysis and experimental evidence of its effectiveness on the x86 platform. It involves two main components: 1) a Pin-based profiler that identifies dynamic dependences in a binary executable and records the associated values induced at their sources and targets, and 2) an analysis tool that computes the strengths of the identified dependences using information theoretic and statistical metrics applied on their associated values. We also study the relation between dynamic dependences and measurable information flow, and the usage of zero strength flows to enhance performance. DITTANY is a building block that can be used in different contexts. We show its usage in data value and indirect branch predictions. Future work will use it in countermeasures against transient execution attacks and in the context of approximate computing

    Reproducing Spectre Attack with gem5: How To Do It Right?

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    International audienceAs processors become more and more complex due to performance optimizations and energy savings, new attack surfaces raise. We know that the micro-architecture of a processor leaks some information into the architectural domain. Moreover, some mechanisms like speculative execution can be exploited to execute malicious instructions. As a consequence, it allows a process to spy another process or to steal data. These attacks are consequences of fundamental design issues, thus they are complicated to fix and reproduce. Simulation would be of a great help for scientific research for microarchitectural security, but it also leads to new challenges. We try to address the first challenges to demonstrate that simulation could be useful in research and an interesting technique to develop in the future

    Calibration Done Right: Noiseless Flush+Flush Attacks

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    International audienceCaches leak information through timing measurements and side-channel attacks. Several attack primitives exist with different requirements and trade-offs. Flush+Flush is a stealthy and fast one that uses the timing of the clflush instruction depending on whether a line is cached. We show that the CPU interconnect plays a bigger role than previously thought in these timings and in Flush+Flush error rate. In this paper, we show that a naive implementation that does not account for the topology of the interconnect yields very high error rates, especially on modern CPUs as the number of cores increases. We therefore reverse-engineer this topology and revisit the calibration phase of Flush+ Flush for different attacker models to determine the correct threshold for clflush hits and misses. We show that our method yields closeto-noiseless side-channel attacks by attacking the AES T-tables implementation of OpenSSL, and by building a covert channel. We obtain a maximal capacity of 5.8 Mbit/s with our method, compared to 1.9 Mbit/s with a naive Flush+Flush implementation on an Intel Core i9-9900 CPU

    SoK: In Search of Lost Time: A Review of JavaScript Timers in Browsers

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    International audienceJavaScript-based timing attacks have been greatly explored over the last few years. They rely on subtle timing differences to infer information that should not be available inside of the JavaScript sandbox. In reaction to these attacks, the W3C and browser vendors have implemented several countermeasures, with an important focus on JavaScript timers. However, as these attacks multiplied in the last years, so did the countermeasures, in a cat-and-mouse game fashion. In this paper, we present the evolution and current situation of timing attacks in browsers, as well as statistical tools to characterize available timers. Our goal is to present a clear view of the attack surface and understand: what are the main prerequisites and classes of browser-based timing attacks and what are the main countermeasures. We focus on determining to what extent the changes on timing-based countermeasures impact browser security. In particular, we show that the shift in protecting against transient execution attacks has re-enabled other attacks such as microarchitectural side-channel attacks with a higher bandwidth than what was possible just two years ago

    CPU Port Contention Without SMT

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    CPU port contention has been used in the last years as a stateless side channel to perform side-channel attacks and transient execution attacks. One drawback of this channel is that it heavily relies on simultaneous multi-threading, which can be absent from some CPUs or simply disabled by the OS. In this paper, we present sequential port contention, which does not require SMT. It exploits sub-optimal scheduling to execution ports for instruction-level parallelization. As a result, specifically-crafted instruction sequences on a single thread suffer from an increased latency. We show that sequential port contention can be exploited from web browsers in WebAssembly. We present an automated framework to search for instruction sequences leading to sequential port contention for specific CPU generations, which we evaluated on 50 different CPUs. An attacker can use these sequences from the browser to determine the CPU generation within 12 second with a 95% accuracy. This fingerprint is highly stable and resistant to system noise, and we show that mitigations are either expensive or only probabilistic

    DYRK1A, a Novel Determinant of the Methionine-Homocysteine Cycle in Different Mouse Models Overexpressing this Down-Syndrome-Associated Kinase

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    BACKGROUND:Hyperhomocysteinemia, characterized by increased plasma homocysteine level, is associated with an increased risk of atherosclerosis. On the contrary, patients with Down syndrome appear to be protected from the development of atherosclerosis. We previously found a deleterious effect of hyperhomocysteinemia on expression of DYRK1A, a Down-syndrome-associated kinase. As increased expression of DYRK1A and low plasma homocysteine level have been associated with Down syndrome, we aimed to analyze the effect of its over-expression on homocysteine metabolism in mice. METHODOLOGY/PRINCIPAL FINDINGS:Effects of DYRK1A over-expression were examined by biochemical analysis of methionine metabolites, real-time quantitative reverse-transcription polymerase chain reaction, and enzyme activities. We found that over-expression of Dyrk1a increased the hepatic NAD(P)H:quinone oxidoreductase and S-adenosylhomocysteine hydrolase activities, concomitant with decreased level of plasma homocysteine in three mice models overexpressing Dyrk1a. Moreover, these effects were abolished by treatment with harmine, the most potent and specific inhibitor of Dyrk1a. The increased NAD(P)H:quinone oxidoreductase and S-adenosylhomocysteine hydrolase activities were also found in lymphoblastoid cell lines from patients with Down syndrome. CONCLUSIONS/SIGNIFICANCE:Our results might give clues to understand the protective effect of Down syndrome against vascular defect through a decrease of homocysteine level by DYRK1A over-expression. They reveal a link between the Dyrk1a signaling pathway and the homocysteine cycle
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