Thermoelectric Power Factor of In2O3:Pd Nanocomposite Films.

A nanocomposite exhibiting large thermoelectric powers and capable of operating at temperatures as high as 1100 °C in air was fabricated by embedding palladium nanoparticles into an indium oxide matrix via co-sputtering from metal and ceramic targets. Combinatorial chemistry techniques were used to systematically investigate the effect of palladium content in these nanocomposite films on thermoelectric response. Based on these rapid screening experiments, the thermoelectric properties of the most promising nanocomposites were evaluated as a function of post-deposition heat treatment at high temperatures. An n-type nanocomposite film was developed exhibiting a power factor of 4.5 x 10-4 W/m·K2 at 1000 °C in air

Suppressing Diffusion-Mediated Exciton Annihilation in 2D Semiconductors Using the Dielectric Environment

Atomically thin semiconductors such as monolayer MoS2 and WS2 exhibit nonlinear exciton-exciton annihilation at notably low excitation densities (below ~10 excitons/um2 in MoS2). Here, we show that the density threshold at which annihilation occurs can be tuned by changing the underlying substrate. When the supporting substrate is changed from SiO2 to Al2O3 or SrTiO3, the rate constant for second-order exciton-exciton annihilation, k_XX [cm2/s], is reduced by one or two orders of magnitude, respectively. Using transient photoluminescence microscopy, we measure the effective room-temperature exciton diffusion coefficient in chemical-treated MoS2 to be D = 0.06 +/- 0.01 cm2/s, corresponding to a diffusion length of LD = 350 nm for an exciton lifetime of {\tau} = 20 ns, which is independent of the substrate. These results, together with numerical simulations, suggest that the effective exciton-exciton annihilation radius monotonically decreases with increasing refractive index of the underlying substrate. Exciton-exciton annihilation limits the overall efficiency of 2D semiconductor devices operating at high exciton densities; the ability to tune these interactions via the dielectric environment is an important step toward more efficient optoelectronic technologies featuring atomically thin materials

Shape-controlled single-crystal growth of InP at low temperatures down to 220 °C.

III-V compound semiconductors are widely used for electronic and optoelectronic applications. However, interfacing III-Vs with other materials has been fundamentally limited by the high growth temperatures and lattice-match requirements of traditional deposition processes. Recently, we developed the templated liquid-phase (TLP) crystal growth method for enabling direct growth of shape-controlled single-crystal III-Vs on amorphous substrates. Although in theory, the lowest temperature for TLP growth is that of the melting point of the group III metal (e.g., 156.6 °C for indium), previous experiments required a minimum growth temperature of 500 °C, thus being incompatible with many application-specific substrates. Here, we demonstrate low-temperature TLP (LT-TLP) growth of single-crystalline InP patterns at substrate temperatures down to 220 °C by first activating the precursor, thus enabling the direct growth of InP even on low thermal budget substrates such as plastics and indium-tin-oxide (ITO)-coated glass. Importantly, the material exhibits high electron mobilities and good optoelectronic properties as demonstrated by the fabrication of high-performance transistors and light-emitting devices. Furthermore, this work may enable integration of III-Vs with silicon complementary metal-oxide-semiconductor (CMOS) processing for monolithic 3D integrated circuits and/or back-end electronics

Blue shifting of the A exciton peak in folded monolayer 1H-MoS2

The large family of layered transition-metal dichalcogenides is widely believed to constitute a second family of two-dimensional (2D) semiconducting materials that can be used to create novel devices that complement those based on graphene. In many cases these materials have shown a transition from an indirect bandgap in the bulk to a direct bandgap in monolayer systems. In this work we experimentally show that folding a 1H molybdenum disulphide (MoS2) layer results in a turbostratic stack with enhanced photoluminescence quantum yield and a significant shift to the blue by 90 meV. This is in contrast to the expected 2H-MoS2 band structure characteristics, which include an indirect gap and quenched photoluminescence. We present a theoretical explanation to the origin of this behavior in terms of exciton screening.Comment: 16 pages, 8 figure

Growth-substrate induced performance degradation in chemically synthesized monolayer MoS2ﾠfield effect transistors

We report on the electronic transport properties of single-layer thick chemical vapor deposition (CVD) grown molybdenum disulfide (MoS2) field-effect transistors (FETs) on Si/SiO2 substrates. MoS2 has been extensively investigated for the past two years as a potential semiconductor analogue to graphene. To date, MoS2 samples prepared via mechanical exfoliation have demonstrated field-effect mobility values which are significantly higher than that of CVD-grown MoS2. In this study, we will show that the intrinsic electronic performance of CVD-grown MoS2 is equal or superior to that of exfoliated material and has been possibly masked by a combination of interfacial contamination on the growth substrate and residual tensile strain resulting from the high-temperature growth process. We are able to quantify this strain in the as-grown material using pre- and post-transfer metrology and microscopy of the same crystals. Moreover, temperature-dependent electrical measurements made on as-grown and transferred MoS2 devices following an identical fabrication process demonstrate the improvement in field-effect mobility

Electrical performance of monolayer MoS2 field-effect transistors prepared by chemical vapor deposition

Molybdenum disulfide (MoS2) field effect transistors (FET) were fabricated on atomically smooth large-area single layers grown by chemical vapor deposition. The layer qualities and physical properties were characterized using high-resolution Raman and photoluminescence spectroscopy, scanning electron microscopy, and atomic force microscopy. Electronic performance of the FET devices was measured using field effect mobility measurements as a function of temperature. The back-gated devices had mobilities of 6.0 cm2/V s at 300K without a high-j dielectric overcoat and increased to 16.1 cm2/V s with a high-j dielectric overcoat. In addition the devices show on/off ratios ranging from 105 to 109