High throughput accelerator interface framework for a linear time-multiplexed FPGA overlay

Coarse-grained FPGA overlays improve design productivity through software-like programmability and fast compilation. However, the effectiveness of overlays as accelerators is dependent on suitable interface and programming integration into a typically processor-based computing system, an aspect which has often been neglected in evaluations of overlays. We explore the integration of a time-multiplexed FPGA overlay over a server-class PCI Express interface. We show how this integration can be optimised to maximise performance, and evaluate the area overhead. We also propose a user-friendly programming model for such an overlay accelerator system

Experimental evaluation of battery cells for space-based radar application

A test program was conducted to characterize five space-quality nickel-hydrogen (NiH2) battery cells. A subset of those tests was also done on five commercial nickel-cadmium (NiCd) cells, for correlation to the characteristics of an Energy Storage Unit Simulator. The test program implemented the recommendations of a 1991 study, as reported to IECEC-92. The findings of the tests are summarized, and expected impacts on the performance of the electrical power system (EPS) of a large space-based radar (SBR) surveillance satellite are derived. The main characteristics examined and compared were terminal voltage (average and transient) and capacity through discharge, equivalent series resistance, derived inductance and capacitance, charge return efficiency, and inter-pulse charge effectiveness

Throughput oriented FPGA overlays using DSP blocks

Design productivity is a major concern preventing the mainstream adoption of FPGAs. Overlay architectures have emerged as one possible solution to this challenge, offering fast compilation and software-like programmability. However, overlays typically suffer from area and performance overheads due to limited consideration for the underlying FPGA architecture. These overlays have often been of limited size, supporting only relatively small compute kernels. This paper examines the possibility of developing larger, more efficient, overlays using multiple DSP blocks and then maximising utilisation by mapping multiple instances of kernels simultaneously onto the overlay to exploit kernel level parallelism. We show a significant improvement in achievable overlay size and overlay utilisation, with a reduction of almost 70% in the overlay tile requirement compared to existing overlay architectures, an operating frequency in excess of 300 MHz, and kernel throughputs of almost 60 GOPS

Are coarse-grained overlays ready for general purpose application acceleration on FPGAs?

Combining processors with hardware accelerators has become a norm with systems-on-chip (SoCs) ever present in modern compute devices. Heterogeneous programmable system on chip platforms sometimes referred to as hybrid FPGAs, tightly couple general purpose processors with high performance reconfigurable fabrics, providing a more flexible alternative. We can now think of a software application with hardware accelerated portions that are reconfigured at runtime. While such ideas have been explored in the past, modern hybrid FPGAs are the first commercial platforms to enable this move to a more software oriented view, where reconfiguration enables hardware resources to be shared by multiple tasks in a bigger application. However, while the rapidly increasing logic density and more capable hard resources found in modern hybrid FPGA devices should make them widely deployable, they remain constrained within specialist application domains. This is due to both design productivity issues and a lack of suitable hardware abstraction to eliminate the need for working with platform-specific details, as server and desktop virtualization has done in a more general sense. To allow mainstream adoption of FPGA based accelerators in general purpose computing, there is a need to virtualize FPGAs and make them more accessible to application developers who are accustomed to software API abstractions and fast development cycles. In this paper, we discuss the role of overlay architectures in enabling general purpose FPGA application acceleration

Kinetics of CO<inf>2</inf>-fluid-rock reactions in a basalt aquifer, Soda Springs, Idaho

The dissolution of silicate minerals by CO2–rich fluids and the subsequent precipitation of CO2 as carbonate minerals represent a means of permanently storing anthropogenic CO2 waste products in a solid and secure form. Modelling the progression of these reactions is hindered by our poor understanding of the rates of mineral dissolution-precipitation reactions and mineral surface properties in natural systems. This study evaluates the chemical evolution of groundwater flowing through a basalt aquifer, which forms part of the leaking CO2-charged system of the Blackfoot Volcanic Field in south-eastern Idaho, USA. Reaction progress is modelled using changes in groundwater chemistry by inverse mass balance techniques. The CO2-promoted fluid-mineral reactions include the dissolution of primary plagioclase, orthoclase, pyroxene and gypsum which is balanced by the precipitation of secondary albite, calcite, zeolite, kaolinite and silica. Mineral mole transfers and groundwater flow rates estimated from hydraulic head data are used to determine the kinetics of plagioclase and orthoclase feldspar dissolution. Plagioclase surface area measurements were determined using the evolution of the U-series isotope ratios in the groundwater and are compared to published surface area measurements. Calculated rates of dissolution for plagioclase range from 2.4 x 10-12 to 4.6 x 10-16 mol/m2/s and orthoclase from 2.0 x 10-13 to 6.8 x 10-16 mol/m2/s respectively. These feldspar reaction rates, correlate with the degree of mineral-fluid disequilibrium and are similar to the dissolution rates for these mineral measured in other natural CO2-charged groundwater systems.Carbon research at Cambridge is supported by Natural Environment Research Council grant NE/F004699/1, part of the UK CRIUS (Carbon Research Into Underground Storage) consortium and DECC through the ‘£20 million’ competition. Niko Kampman acknowledges financial support from Shell Global Solutions International.This is the final version of the article. It first appeared from Elsevier via http://dx.doi.org/10.1016/j.apgeochem.2015.06.01