Bi-directional of a Built-in Test Circuit for Interconnect Defects in Assembled PCBs

Bi-directional of a built-in test circuit is proposed to detect open defects at inputs and output interconnects between ICs and a PCB. The test circuit is based on an electrical characteristic of an inverter gate. A test method is related to supply current which flows to the inverter by providing a test signal to the test circuit. The test signal is generated by an AC voltage signal with a DC offset voltage. The open defects which occur at the interconnects will be detected by the large supply current flows to the inverter. On the other hand, if the defects don't occur, the supply current of the inverter is almost zero. Testability of the test circuit is examined using a Spice simulation. The results show that the open defects at the interconnects can be detected and located

タソウ ハイセン LSI ノ ダンセン コショウ ケンサ ニ カンスル ケンキュウ

Open faults are difficult to test since the floating wire occurred by an open fault has unstable voltage. In this work, the effect of adjacent lines around an open fault in multi-layered wiring LSIs is discussed. To observe the relation between an open fault and the adjacent lines, a 0.35μm CMOS IC is designed and fabricated. The open fault macros with a transmission gate and with an intentional break are included in the IC. The adjacent lines in the same layer and the different layers are placed in the test chip. The simulation and experimental results show that the voltage at the floating wire is affected by the adjacent lines

Epitaxially stabilized iridium spinel oxide without cations in the tetrahedral site

Single-crystalline thin film of an iridium dioxide polymorph Ir2O4 has been fabricated by the pulsed laser deposition of LixIr2O4 precursor and the subsequent Li-deintercalation using soft chemistry. Ir2O4 crystallizes in a spinel (AB2O4) without A cations in the tetrahedral site, which is isostructural to lambda-MnO2. Ir ions form a pyrochlore sublattice, which is known to give rise to a strong geometrical frustration. This Ir spinel was found to be a narrow gap insulator, in remarkable contrast to the metallic ground state of rutile-type IrO2. We argue that an interplay of strong spin-orbit coupling and a Coulomb repulsion gives rise to an insulating ground state as in a layered perovskite Sr2IrO4.Comment: 9 pages, 3 figure

Lowering the Energy Threshold using a Plastic Scintillator and Radiation-Damaged SiPMs

The radiation damage to a silicon photomultiplier (SiPM) set on a satellite orbit increases energy threshold for scintillator detectors. We confirmed that 1 krad of radiation increases the energy threshold by approximately a factor of 10, which is worst for our system. Using one or two SiPMs damaged by proton irradiation and a plastic scintillator, we performed the following three experiments in our attempt to lower the energy threshold of radiation-damaged SiPMs to the greatest extent: (1) measurements using a current waveform amplifier rather than a charge-sensitive amplifier, (2) coincidence measurements with two radiation-damaged SiPMs attached to one scintillator and summing up their signals, and (3) measurements at a low temperature. Our findings confirmed that the use of a current waveform amplifier, as opposed to a charge-sensitive amplifier and a shaping amplifier, could lower the energy threshold to approximately 65% (from 198 keV to 128 keV). Furthermore, if we set the coincidence width appropriately and sum up the signals of the two SiPMs in the coincidence measurement, the energy threshold could be lowered to approximately 70% (from 132 keV to 93 keV) with little loss of the acquired signal, compared to that of use of only one scintillator. Finally, if we perform our measurements at a temperature of -20 {\deg}C, we could lower the energy threshold to approximately 34% (from 128 keV to 43 keV) compared to that of at 20 {\deg}C. Accordingly, we conclude that the energy threshold can be lowered to approximately 15% by using a combination of these three methods.Comment: Accepted for publication in Nuclear Instruments and Methods in Physics Research Section A. Comments are welcome

Electrical Tests for Capacitive Open Defects in Assembled PCBs

Nowadays, Ball Grid Array (BGA) becomes a major packaging type due to its high bulk for input/output (I/O) pins. However, there are defects such as voids and cracks occurring between a BGA IC and a PCB which may result in an electrical failure in the circuit. This paper presents electrical tests for capacitive open defects occurring at an interconnection between an IC and a PCB. Feasibility of the electrical test with the test circuit is evaluated by SPICE simulation and experiments. Capacitive open defects occurring at interconnects are detected by the test method. Both simulation and experimental results showed that capacitive open defects generating no logical errors can be detected by the test method at a test speed of 1kHz and 1MHz