Time Dynamics of the Down-Coupling Phenomenon in 3-D NAND Strings

We present a detailed analysis of the time dynamics of the down-coupling phenomenon (DCP) in 3-D NAND Flash memory strings. The transient time dynamics of the channel potential following the wordline (WL) bias transition fromthe pass voltage to zero is studied via numerical simulation, highlighting the existence of three temporal regimes controlledby different physical processes: electron emission from traps, hole injection from the string edges followed by capture, and propagation along the string. The impact of these processes is separately studied, followed by an analysis of the dependence of the DCP recovery time on architectural parameters. Results highlight the relevant physics and can be used as a design guideline for NAND strings with reduced sensitivity to the DCP

Electrode-dependent asymmetric conduction mechanisms in K0.5Na0.5NbO3 micro-capacitors

The ultimate performance of devices employing lead-free piezoelectrics is determined not only by the intrinsic properties of the piezo, but also by processes and materials employed to create the electric contacts. In this paper, we investigate the impact of different metallic electrodes with increasing chemical reactivity (Pt, Ni, Ti, Cr), on the asymmetric behavior of the leakage current in M/K0.5Na0.5NbO3/Pt(111) micro-capacitors, where M stands for the top metallic electrode. For all electrodes we found a marked leakage asymmetry that we ascribed to the presence of a Schottky-like rectifying junction at the M/K0.5Na0.5NbO3/Pt(111) bottom interface, while the corresponding junction at the top interface is deeply affected by the creation of oxygen vacancies due to oxygen scavenging during the growth of the top metallic electrodes, leading to an almost ohmic top contact. The leakage increases with the reactivity of the electrodes, while the asymmetry decreases, thus suggesting that the creation of the top metal/K0.5Na0.5NbO3 interface generates oxygen vacancies diffusing down to the bottom interface and impacting on the rectifying behavior of the Schottky-like junction. Noteworthy, this asymmetric conduction can reflect in an asymmetric piezoelectric and ferroelectric behavior, as a sizable portion of the applied voltage drops across the rectifying junction in reverse bias, thus hampering symmetric bipolar operation, especially in leaky materials

A Noise-Resilient Neuromorphic Digit Classifier Based on NOR Flash Memories with Pulse-Width Modulation Scheme

In this work, we investigate the implementation of a neuromorphic digit classifier based on NOR Flash memory arrays as artificial synaptic arrays and exploiting a pulse-width modulation (PWM) scheme. Its performance is compared in presence of various noise sources against what achieved when a classical pulse-amplitude modulation (PAM) scheme is employed. First, by modeling the cell threshold voltage (VT) placement affected by program noise during a program-and-verify scheme based on incremental step pulse programming (ISPP), we show that the classifier truthfulness degradation due to the limited program accuracy achieved in the PWM case is considerably lower than that obtained with the PAM approach. Then, a similar analysis is carried out to investigate the classifier behavior after program in presence of cell VT instabilities due to random telegraph noise (RTN) and to temperature variations, leading again to results in favor of the PWM approach. In light of these results, the present work suggests a viable solution to overcome some of the more serious reliability issues of NOR Flash-based artificial neural networks, paving the way to the implementation of highly-reliable, noise-resilient neuromorphic systems