Abusing Hardware Race Conditions for High Throughput Energy Efficient Computation

We propose a novel computing approach, called “Race Logic”, which utilizes a new data representation to accelerate a broad class of optimization problems, such as those solved by dynamic programming algorithms. The core idea of Race Logic is to deliberately engineer race conditions in a circuit to perform useful computation. In Race Logic, information, instead of being represented as logic levels (as is done in conventional logic), is represented as a timing delay. Computations can then be performed by observing the relative propagation times of signals injected into a configurable circuit (i.e. the outcome of races through the circuit).In this dissertation I will introduce Race Based computation and talk about multiple VLSI implementations. We first begin by considering a synchronous approach, which uses simple clocked delay elements. Though this synchronous implementation outperforms highly optimized conventional implementations of the well-studied, DNA sequence alignment problem, its third order energy scaling with problem size and limited dynamic range of timing delays are its major pitfalls. Next, in the search for energy efficiency, we study asynchronous designs in order to understand the performance trade-offs and applicability of this new architecture. Finally, I will present the results of a prototype asynchronous Race Logic chip and demonstrate that Race-Based computations can align up to 10 million 50 symbol long DNA sequences per second, about 2-3 orders of magnitude faster than the state of the art general purpose computing systems

Unbiased Random Number Generation using Injection-Locked Spin-Torque Nano-Oscillators

Unbiased sources of true randomness are critical for the successful deployment of stochastic unconventional computing schemes and encryption applications in hardware. Leveraging nanoscale thermal magnetization fluctuations provides an efficient and almost cost-free means of generating truly random bitstreams, distinguishing them from predictable pseudo-random sequences. However, existing approaches that aim to achieve randomness often suffer from bias, leading to significant deviations from equal fractions of 0 and 1 in the bitstreams and compromising their inherent unpredictability. This study presents a hardware approach that capitalizes on the intrinsic balance of phase noise in an oscillator injection locked at twice its natural frequency, leveraging the stability of this naturally balanced physical system. We demonstrate the successful generation of unbiased and truly random bitstreams through extensive experimentation. Our numerical simulations exhibit excellent agreement with the experimental results, confirming the robustness and viability of our approach.Comment: 13 pages, 8 figure