6 research outputs found

    Safety and Efficacy of a Dapivirine Vaginal Ring for HIV Prevention in Women.

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    BACKGROUND: The incidence of human immunodeficiency virus (HIV) infection remains high among women in sub-Saharan Africa. We evaluated the safety and efficacy of extended use of a vaginal ring containing dapivirine for the prevention of HIV infection in 1959 healthy, sexually active women, 18 to 45 years of age, from seven communities in South Africa and Uganda. METHODS: In this randomized, double-blind, placebo-controlled, phase 3 trial, we randomly assigned participants in a 2:1 ratio to receive vaginal rings containing either 25 mg of dapivirine or placebo. Participants inserted the rings themselves every 4 weeks for up to 24 months. The primary efficacy end point was the rate of HIV type 1 (HIV-1) seroconversion. RESULTS: A total of 77 participants in the dapivirine group underwent HIV-1 seroconversion during 1888 person-years of follow-up (4.1 seroconversions per 100 person-years), as compared with 56 in the placebo group who underwent HIV-1 seroconversion during 917 person-years of follow-up (6.1 seroconversions per 100 person-years). The incidence of HIV-1 infection was 31% lower in the dapivirine group than in the placebo group (hazard ratio, 0.69; 95% confidence interval [CI], 0.49 to 0.99; P=0.04). There was no significant difference in efficacy of the dapivirine ring among women older than 21 years of age (hazard ratio for infection, 0.63; 95% CI, 0.41 to 0.97) and those 21 years of age or younger (hazard ratio, 0.85; 95% CI, 0.45 to 1.60; P=0.43 for treatment-by-age interaction). Among participants with HIV-1 infection, nonnucleoside reverse-transcriptase inhibitor resistance mutations were detected in 14 of 77 participants in the dapivirine group (18.2%) and in 9 of 56 (16.1%) in the placebo group. Serious adverse events occurred more often in the dapivirine group (in 38 participants [2.9%]) than in the placebo group (in 6 [0.9%]). However, no clear pattern was identified. CONCLUSIONS: Among women in sub-Saharan Africa, the dapivirine ring was not associated with any safety concerns and was associated with a rate of acquisition of HIV-1 infection that was lower than the rate with placebo. (Funded by the International Partnership for Microbicides; ClinicalTrials.gov number, NCT01539226 .)

    Fotogrammetrie wordt instagrammetrie: hoe (goed) kunnen foto's puntenwolken creëren?

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    Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS

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    A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS

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    As CMOS scales down and grows more expensive, area-aware RF front-end design becomes appropriate. A wideband front-end is presented that uses an inductorless LNA and downconversion section up to 6 GHz. Frequency synthesis is realized using a single-inductor dual-band 3.5 and 10 GHz VCO. In-depth analysis describes the operation of the 4-port oscillator, and compares phase noise to that of a classical VCO. The front-end is realized in 90 nm digital CMOS. The LNA achieves a noise figure of 2.7 dB with an average IIP3 of -2 dBm. The dual-band VCO achieves a phase noise of -122 dBc/Hz and -128 dBc/Hz at 3.9 GHz and 10 GHz, respectively, at 2.5 MHz offset. Both circuits are embedded in a wideband direct-conversion front-end consuming less than 60 mW from a 1.2 V supply

    Analysis and Design of a CMOS Ultra-High-Speed Burst Mode Imager with In-Situ Storage Topology Featuring In-Pixel CDS Amplification

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    This paper presents an in-situ storage topology for ultra-high-speed burst mode imagers, enabling low noise operation while keeping a high frame depth. The proposed pixel architecture contains a 4T pinned photodiode, a correlated double sampling (CDS) amplification stage, and an in-situ memory bank. Focusing on the sampling noise, the system level trade-off of the proposed pixel architecture is discussed, showing its advantages on the noise, power, and scaling capability. Integrated with an AC coupling CDS stage, the amplification is obtained by exploiting the strong capacitance to the voltage relation of a single NMOS transistor. A comprehensive noise model is developed for optimizing the trade-off between the area and noise. As a proof-of-concept, a prototype imager with a 30 µm pixel pitch was fabricated in a CMOS 130 nm technology. A 108-cell memory bank is implemented allowing dense layout and parallel readout. Two types of CDS amplification stages were investigated. Despite the limited memory capacitance of 10 fF/cell, the photon transfer curves of both pixel types were measured over different operation speeds up to 20 Mfps showing a noise performance of 8.4 e−
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