Fully integrated high quality factor GmC bandpass filter stage with highly linear operational transconductance amplifier

This paper presents an electrical, fully integrated, high quality (Q) factor GmC bandpass filter (BPF) stage for a wireless 27 MHz direct conversion receiver for a bendable sensor system-in-foil (Briem, 2016). The core of 10 the BPF with a Q factor of more than 200 is an operational transconductance amplifier (OTA) with a high linearity at an input range of up to 300 mVpp,diff. The OTA’s signal-to-noise-and-distortion-ratio (SNDR) of more than 80 dB in the mentioned range is achieved by stabilizing its transconductance Gm with a respective feedback loop and a source degeneration resistance RDG. The filter stage can be tuned and is tolerant to global and local process variations due to offset and common-mode 15 feedback (CMFB) control circuits. The results are determined by periodic steady state (PSS) simulations at more than 200 global and local process variation parameter and temperature points and corner simulations. It is expected, that the parasitic elements of the layout have no significant influence on the filter behaviour. The current consumption of the whole filter stage is less than 600 μA

High-Speed Serializer for a 64 GS s⁻¹ Digital-to-Analog Converter in a 28 nm Fully-Depleted Silicon-on-Insulator CMOS Technology

An attractive solution to provide several channels with very high data rates of tens of Gbit&thinsp;s−1 for digital-to-analog converters (DACs) in arbitrary waveform generators (AWGs) is to use a high speed serializer in front of the DAC. As data sources, on-chip memories, digital signal processors or field-programmable gate arrays can be used. Here, we present a serializer consisting of a 19 channel 16:1 multiplexer (MUX) for output data rates up to 64&thinsp;Gbit&thinsp;s−1 per channel and a low skew ( ∼ &thinsp;8.8&thinsp;ps) two-phase frequency divider and clock distribution network that is completely realized in static CMOS logic. The circuit is designed in a 28&thinsp;nm Fully-Depleted Silicon-on-Insulator (FD-SOI) technology and will be used in an 8&thinsp;bit 64&thinsp;GS&thinsp;s−1 DAC between the on-chip memory and the DAC output stage. Due to a four bits unary and four bits binary segmentation, a 19 channel MUX is required. Simulations on layout level reveal a data-dependent peak-to-peak jitter of less than 1.8&thinsp;ps at the output of one MUX channel with a total average power consumption of approximately 1.15&thinsp;W of the whole MUX and clock network.</p

Dynamic large-signal I-V analysis and non-linear modelling of ALGAN/GAN HEMTS

For AlGaN/GaN high electron mobility transistors (HEMTs), the voltage and current waveforms at CW large-signal operation at 5 GHz have been reconstructed from experimental magnitude and phase information on fundamental and higher harmonics of transmitted and reflected signals. To compare with the DC behaviour, the clipped waveforms have accurately been analysed to recover the dynamic output characteristics in view of dispersion effects related to self-heating. In conjunction with small-signal S-parameter data, the large-signal experimental results have been used in an attempt to apply a HEMT large-signal model, showing satisfactory agreement of simulated and measured characteristics at least in regions where self-heating is not much pronounced

Design of a 0.13&thinsp;µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

This paper presents the design of a limiting amplifier with 1-to-3 fan-out implementation in a 0.13 µm SiGe BiCMOS technology and gives a detailed guideline to determine the circuit parameters of the amplifier for optimum high-frequency performance based on simplified gain estimations. The proposed design uses a Cherry-Hooper topology for bandwidth enhancement and is optimized for maximum group delay flatness to minimize phase distortion of the input signal. With regard to a high integration density and a small chip area, the design employs no passive inductors which might be used to boost the circuit bandwidth with inductive peaking. On a RLC-extracted post-layout simulation level, the limiting amplifier exhibits a gain-bandwidth-product of 14.6 THz with 56.6 dB voltage gain and 21.5 GHz 3 dB bandwidth at a peak-to-peak input voltage of 1.5 mV. The group delay variation within the 3 dB bandwidth is less than 0.5 ps and the power dissipation at a power supply voltage of 3 V including output drivers is 837 mW

DYNAMIC LARGE-SIGNAL I-V ANALYSIS AND NON-LINEAR MODELLING OF ALGAN/GAN HEMTS

ABSTRAC

SPARS : simultanes Phasen- und Amplituden-regenerativ-Sampling

In 2012 a group of researchers proposed a basic research initiative to the German Research Foundation (DFG) as a special priority project (SPP) with the name: Wireless 100 Gbps and beyond. The main goal of this initiative was the investigation of architectures, technologies and methods to go well beyond the state of the art. The target of 100 Gbps was set far away from the (at that time) achievable 1 Gbps such that it was not possible to achieve promising results just by tuning some parameters. We wanted to find breakthrough solutions. When we started the work on the proposal we discussed the challenges to be addressed in order to advancing the wireless communication speed significantly. Having the fundamental Shannon boundary in mind we discussed how to achieve the 100 Gbps speed.Angesichts der rapiden Entwicklung der Funkkommunikation hat die Deutsche Forschungsgemeinschaft im Jahr 2012 ein Schwerpunktprogramm mit dem Titel "Wireless 100 Gbps and beyound" (dt.: Drahtloskommunikation mit 100 Gbps und mehr) gestartet. Diese Initiative zielte auf neue Lösungen, Methoden und neues Wissen zur Lösung des Problems des kontinuierlichen Bedarfs an immer höheren Datenraten im Bereich der Funkkommunikation. Eine international besetze Jury hat etliche Projektvorschläge evaluiert, aus denen 11 Projekte ausgewählt und über zweimal 3 Jahre von Mitte 2013 bis Mitte 2019 gefördert wurden. Das vorliegende Buch versammelt die Ansätze, Architekturen und Erkenntnisse der Projekte. Es überspannt einen breiten Themenbereich, angefangen mit speziellen Fragen der physikalischen Übertragung, des Antennendesigns und der HF-Eingangs-Architekturen für unterschiedliche Frequenzbereiche bis 240 GHz. Darüber hinaus beschreibt das Buch Ansätze für Ultra-Hochgeschwindigkeits-Funksysteme, deren Basisbandverarbeitung, Kodierung sowie mögliche Umsetzungen. Nicht zuletzt wurden auch Fragen des Protokolldesigns behandelt, um eine enge Integration in moderne Computersysteme zu erleichtern