Quantum Key Distribution: Advantages, Challenges and Policy

The prospect of quantum computing threatens the security of modern encryption methods, putting our private communications at risk. With experts predicting the development of powerful quantum computers as early as the end of the decade, the urgency of transitioning to `quantum-safe’ communications is apparent. There are two classes of solutions available: post-quantum cryptography (PQC), which refers to communication algorithms designed to be safe against quantum computers, and quantum key distribution (QKD), a new technology with unique advantages and challenges. These solutions are not mutually exclusive, and this review argues that they are in fact complementary solutions to the threat of quantum computing. However, QKD has received criticism for being a less practical solution than PQC. This review makes the case for QKD and argues that it offers significant advantages which are not adequately recognised. I conclude that the development of QKD would benefit from increased government support and I provide policy recommendations for how to best support it

Rethinking Informed Consent in the Context of Big Data

A widely accepted method for addressing digital privacy concerns is the use of informed consent: asking users to agree to privacy policies and consent to the use of their personal data. This approach has come under strain with the emergence of “big data” in which large datasets are collected and analysed. This paper argues that since individuals do not understand or even read the privacy policies they agree to, informed consent ultimately fails to protect privacy. Following the work of Solon Barocas and Helen Nissenbaum, this paper proposes an updated definition of informed consent and argues that the responsibility of protecting privacy should be shifted from individuals to organisations

Quantified Effects of the Laser Seeding Attack in Quantum Key Distribution

Quantum key distribution (QKD) enables private communications with information-theoretic security. To guarantee the practical security of QKD, it is essential that QKD systems are implemented in accordance to theoretical requirements and robust against side-channel attacks. Here we study a prominent attack on QKD transmitters known as the laser seeding attack (LSA). It consists in injecting photons into the laser of the transmitter in an attempt to modify the outgoing light in some way that is beneficial to the eavesdropper. In this work we measure the response of a QKD transmitter to the LSA as a function of the optical power injected, allowing us to quantify the level of optical attenuation required to mitigate the attack. Further, we employ a laser rate equation model to numerically simulate the effects of the LSA on a gain-switched laser. With this model we are able to reproduce previous experimental results, as well as generate new insight into the LSA by examining the effects of the LSA when the QKD transmitter is operated with different laser current driving parameters

REDEFIS : A System with a Redefinable Instruction Set Processor

The 19th Annual Symposium on Integrated Circuits and Systems Design : Brazil : August 28 - September 1, 2006The growing complexity and production cost of processor-based systems have imposed big constraints in SoC design of new systems. GPPs and ASICs are unable to fit the tight performance or power constraints, or too complex to design in short TAT/TTM. REDEFIS is a HW/SW design platform for high level, efficient implementation of ASIPs/engines for SoC systems. It is composed of a reconfigurable instruction-set processor, capable to redefine its ISA according to the user application written in high level C language, and a set of design tools (an ISA Generator and a retargetable compiler). These processors can be used as flexible engines in embedded MPSoC systems, where its ISA is fully customized and design is done at high level C (no HDL writing is necessary). In this paper we present the Redefis design platform and an implementation of our dynamically reconfigurable ISA processor (codename Vulcan). Our results demonstrate the effectiveness of the system for encryption and bitwise applications

REDEFIS : A System with a Redefinable Instruction Set Processor

The growing complexity and production cost of processor-based systems have imposed big constraints in SoC design of new systems. GPPs and ASICs are unable to fit the tight performance or power constraints, or too complex to design in short TAT/TTM. REDEFIS is a HW/SW design platform for high level, efficient implementation of ASIPs/engines for SoC systems. It is composed of a reconfigurable instruction-set processor, capable to redefine its ISA according to the user application written in high level C language, and a set of design tools (an ISA Generator and a retargetable compiler). These processors can be used as flexible engines in embedded MPSoC systems, where its ISA is fully customized and design is done at high level C (no HDL writing is necessary). In this paper we present the Redefis design platform and an implementation of our dynamically reconfigurable ISA processor (codename Vulcan). Our results demonstrate the effectiveness of the system for encryption and bitwise applications.The 19th Annual Symposium on Integrated Circuits and Systems Design : Brazil : August 28 - September 1, 200

動的再構成可能プロセッサVulcanの評価

特定用途向けプロセッサとは，アプリケーションに特化した命令を実行することによって，汎用プロセッ サに対して高性能を実現するものである．本稿では，特定用途向けプロセッサの実現方式として，データパスに動的 再構成可能ハードウェアを用いたプロセッサVulcan を提案する．また，実際にアプリケーションを実装した結果を， 汎用プロセッサで同様のアプリケーションを実行した結果と比較し，Vulcan の評価を行った．Application specific extensions of a processor provide higher performance. In this paper, the authors propose “Vulcan” the Application specific processor with dynamically reconfigurable datapath, and demonstrate the efficiency of the proposed processor

A Study of the Dynamically Reconfigurable Processor Vulcan

特定用途向けプロセッサとは，アプリケーションに特化した命令を実行することによって，汎用プロセッ サに対して高性能を実現するものである．本稿では，特定用途向けプロセッサの実現方式として，データパスに動的 再構成可能ハードウェアを用いたプロセッサVulcan を提案する．また，実際にアプリケーションを実装した結果を， 汎用プロセッサで同様のアプリケーションを実行した結果と比較し，Vulcan の評価を行った．Application specific extensions of a processor provide higher performance. In this paper, the authors propose “Vulcan” the Application specific processor with dynamically reconfigurable datapath, and demonstrate the efficiency of the proposed processor

動的再構成可能プロセッサVulcan2 とそのソフトウェア開発環境ISAcc に関する研究

特定用途向けプロセッサとは，アプリケーションに特化した命令を実行することによって，汎用プロセッサに対して高性能を実現するものである．本稿では，特定用途向けプロセッサの実現方式として，データパスに動的再構成可能ハードウェアを用いたプロセッサVulcan2 とそのソフトウェア開発環境ISAcc を提案する．また，実際にISAcc を用いてアプリケーションをVulcan2 シミュレータ上に実装した結果を解析し，Vulcan2 及びISAcc の評価を行った．Application specific extensions of a processor provide higher performance. In this paper, the authors propose“Vulcan2” the Application specific processor with dynamically reconfigurable datapath and “ISAcc” Vulcan2’s development tool, and demonstrate the efficiency of the proposed processor

2018 ESC/ESH Guidelines for the management of arterial hypertension

No abstract available