11 research outputs found

    Evaluation and Suppression of Oscillations in Inductive Power Transfer Systems with Constant Voltage Load and Pulse Skipping Modulation

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    This paper identifies how Constant Voltage Load (CVL) characteristics cause Inductive Power Transfer (IPT) systems to exhibit a poorly damped oscillation mode. When operated with pulse skipping strategies such as Pulse Density Modulation (PDM), the skipped voltage pulses can excite this mode and cause severe oscillations that do not appear in systems with a constant resistance load (CRL). The critical mode is identified from a linearized state-space model of the system and two control approaches are proposed for attenuating the oscillations in current amplitude and power flow. Firstly, the influence of the operating frequency on the critical eigenvalue is analyzed and it is shown how slightly off-resonant operation can increase the damping of the oscillation mode. Secondly, an active damping method based on sending current feedback control is studied. The active damping is based on Phase Shift Modulation (PSM) with limited phase shift angles applied to the PDM signal when oscillations are detected. The effectiveness and feasibility of the proposed methods are validated by simulations and experimental results from a small-scale laboratory prototype.Evaluation and Suppression of Oscillations in Inductive Power Transfer Systems with Constant Voltage Load and Pulse Skipping ModulationacceptedVersio

    Development of a scale model of a Modular Multilevel Converters

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    Modular Multilevel Converters are now being introduced in the power grid. Control systems for these converters are complex with many degrees of freedom. Simulation models are useful for exploring control algorithms, but there is still a need for acquiring experience from real converters. As extensive experiments on full-scale converters are not always feasible due to the cost and potential consequences, reduced-scale models that correctly reproduce the salient characteristics of the original converters are necessary. This paper describes the development of 60 kVA scaled models of modular multilevel converters with 6 halfbridge, 12 fullbridge and 18 halfbridge cells per arm, respectively. Most parameters scale naturally, but the equivalent series resistance and therefore the per-unit losses due to load current tend to increase, giving more damping of oscillation than in the full-scale reference.publishedVersio

    Development of a scale model of a Modular Multilevel Converters

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    Modular Multilevel Converters are now being introduced in the power grid. Control systems for these converters are complex with many degrees of freedom. Simulation models are useful for exploring control algorithms, but there is still a need for acquiring experience from real converters. As extensive experiments on full-scale converters are not always feasible due to the cost and potential consequences, reduced-scale models that correctly reproduce the salient characteristics of the original converters are necessary. This paper describes the development of 60 kVA scaled models of modular multilevel converters with 6 halfbridge, 12 fullbridge and 18 halfbridge cells per arm, respectively. Most parameters scale naturally, but the equivalent series resistance and therefore the per-unit losses due to load current tend to increase, giving more damping of oscillation than in the full-scale reference

    Challenges and Rationale for Laboratory Research of Offshore Grids

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    Offshore power systems will be characterized by a large penetration of power electronics converters and power cables, resulting in complex behaviors that can be quite different from traditional AC systems. Analyzing such systems is challenging due to their complexity and the relative lack of experience. In this context, performing laboratory tests in scaled down model network have significant relevance to verify simulation models and to test equipment and control methods in a controlled environment. The design of the laboratory needs to be a compromise between the capability to accurately reproduce the real system behavior and the practical constraints on ease of use, equipment size, cost and safety. This paper summarizes the main design considerations for a laboratory infrastructure dedicated to research of future offshore grids and the possible challenges. The laboratory facility developed jointly by NTNU (Norwegian University of Science and Technology) and SINTEF Energy Research is described with examples of the experimental possibilities

    Laboratory Verification of the Modular Converter for a 100 kV DC Transformerless Offshore Wind Turbine Solution

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    In this paper, an experimental verification of the control of a modular series connected voltage source converter suitable for an HVDC transformerless offshore wind turbine is presented. The test bench is built around a 45 kW special generator prototype with three stator segments. Three 20 kW voltage source converter modules were used in the series connected converter. The experimental results verified the feasibility of a modular, decoupled control system design approach which has earlier been investigated through simulations. In addition, the experimental results are compared to simulations to verify the model implemented in EMTDC/PSCAD

    A Design Method of an Embedded Real-Time Simulator for Electric Drives using Low-Cost System-on-Chip Platform

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    This paper presents a modular and easily reusable Zynq System-on-Chip (SoC) based Embedded Real-Time Simulator (ERTS) aimed for rapid prototyping of electric drives. The power hardware components of the drive including the voltage source converters (VSC) is programmed in the field programmable gate array (FPGA) fabric of the SoC to achieve real-time emulation. The control algorithms of the electric motor drive are programmed in the on-chip processor which can be used to drive either the physical- or emulated- hardware. The ERTS is scaled in the per-unit system to enhance reusability irrespective of the hardware ratings. The architectures and schematics of different partitions of the ERTS are illustrated. The simulator is demonstrated using a position–sensorless, interior permanent magnet synchronous machine (IPMSM) drive and compared against offline simulation for performance

    Driver stage implementation with improved turn-on and turn-off delay for wide band gap devices

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    Minimization of dead time effect on bridge converter output voltage quality by use of advanced gate drivers

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    This paper presents a voltage-controlled multistage gate driver topology for delay time minimization that improves the converter output voltage quality while supplying a motor load. Three gate driver topologies for SiC MOSFETs are compared based on their dead time requirement in a bridge leg converter. Experimental results of the gate driver delay times are reported and are used as input to a simulated motor drive application. Results show that turn-off delay times can be reduced by up to 74 % for the multistage driver compared to the conventional counterpart when the rate of change for the converter voltage output is limited to 10 V/ns. Furthermore, minimizing the dead time increases the linearity region of the output voltage from the converter by 1.8 % to 3.8 % and reduces the current THD in the linear region by up to 7.7 % when switching at 15kHz

    Driver stage implementation with improved turn-on and turn-off delay for wide band gap devices

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    This paper presents a driver topology intended for WBG devices with the goal of improving the switching performance. In particular, the initial delay time of the switching transient was targeted. In high power and high frequency bridge converters, the dead time causes output voltage waveform distortion and increases losses. Shorter delay time leads to shorter dead time requirement. Simulations show that the delay time can be minimised by correctly implementing the suggested driver stage. For the experimental validation, an improvement of 6-8 ns was demonstrated while keeping the same di/dt and dv/dt as a conventional gate driver. The improvement increases with increasing gate resistance.submittedVersion© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works
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