Towards a realistic GaAs-spin qubit device for a classical error-corrected quantum memory

Based on numerically-optimized real-device gates and parameters we study the performance of the phase-flip (repetition) code on a linear array of Gallium Arsenide (GaAs) quantum dots hosting singlet-triplet qubits. We first examine the expected performance of the code using simple error models of circuit-level and phenomenological noise, reporting, for example, a circuit-level depolarizing noise threshold of approximately 3%. We then perform density-matrix simulations using a maximum-likelihood and minimum-weight matching decoder to study the effect of real-device dephasing, read-out error, quasi-static as well as fast gate noise. Considering the trade-off between qubit read-out error and dephasing time (T2) over measurement time, we identify a sub-threshold region for the phase-flip code which lies within experimental reach.Comment: 22 page

Towards a realistic GaAs-spin qubit device for a classical error-corrected quantum memory

Based on numerically optimized real-device gates and parameters we study the performance of the phase-flip (repetition) code on a linear array of gallium arsenide (GaAs) quantum dots hosting singlet-triplet qubits. We first examine the expected performance of the code using simple error models of circuit-level and phenomenological noise, reporting, for example, a circuit-level depolarizing noise threshold of approximately 3%. We then perform density-matrix simulations using a maximum-likelihood and minimum-weight matching decoder to study the effect of real-device dephasing, readout error, and quasistatic as well as fast gate noise. Considering the tradeoff between qubit readout error and dephasing time (T2) over measurement time, we identify a subthreshold region for the phase-flip code which lies within experimental reach.QCD/Terhal GroupQuTechQuantum Computin

Large, Tunable Valley Splitting and Single-Spin Relaxation Mechanisms in a Si / Si x Ge 1 − x Quantum Dot

Valley splitting is a key feature of silicon-based spin qubits. Quantum dots in Si/SixGe1−x heterostructures reportedly suffer from a relatively low valley splitting, limiting the operation temperature and the scalability of such qubit devices. Here, we demonstrate a robust and large valley splitting exceeding 200 μeV in a gate-defined single quantum dot, hosted in molecular-beam-epitaxy-grown 68Si/SixGe1−x. The valley splitting is monotonically and reproducibly tunable up to 15% by gate voltages, originating from a 6-nm lateral displacement of the quantum dot. We observe static spin relaxation times T1>1 s at low magnetic fields in our device containing an integrated nanomagnet. At higher magnetic fields, T1 is limited by the valley hotspot and by phonon noise coupling to intrinsic and artificial spin-orbit coupling, including phonon bottlenecking