Bending properties in oxidized porous silicon waveguides

The greatest limit in high-speed communications between different circuit blocks is due to the delays introduced by metal interconnections. Knock-down wire communication bottleneck is, therefore, one of the best goals that current research could reach in the held of fast electronics. A possible solution is to build fast optical links and even better if the technology is based on silicon. To attain these ends, we have made studies into possibility to fabricate optical waveguide based on oxidized porous silicon. In the last few years, such a device: was realized and characterized. Waveguiding in the visible and in the near infrared was demonstrated, With propagation losses of about 3-5 dB/cm for a light with a wavelength of 632.8 nm. Moreover, a design feature of an integrated waveguide based on oxidized porous silicon is that it offers a spontaneous bending of the waveguiding layer at its ends. The edge bending is provided by a convex camber of a leading edge of forming porous silicon. This bending can be exploited to promote a vertical light output with no use of any additional devices. The paper discusses the properties of edge bending, evaluation of the light losses depending on the radius of curvature, and analysis of possibilities to reduce these losses. (C) 2001 Elsevier Science Ltd. All rights reserved

Er-doped Oxidized Porous Silicon Waveguides

The present work reports Er-doped channel oxidized porous silicon waveguides (OPSWG) formed from n+-type Si by the two-step anodisation process. Er has been introduced into porous silicon before oxidation by a cathodic treatment in 0.1 M Er (NO3)3 aqueous solution. A correlation between Er concentration and refractive index profiles has shown dominant core doping with Er relative to cladding regions. Reported Er concentration of 0.8 at.% in the OPSWG is large enough to attain the amplification effect

Gettering Technology Based on Porous Silicon

This paper briefly reviews a gettering technology based on porous silicon (PS). PS layers shown to have effecting gettering properties for fast-diffusing impurities. Samples saturated with Au or Cu on which the PS layer made on the wafer backside, increases the generation lifetime of minority carriers from 0.05 – 0.1 µs to 0.5 µs. The PS getter is demonstrated to be located either on the wafer backside or on the front side underneath an epitaxial layer. When formed on the wafer backside, the PS getter may be readily removed together with the absorbed impurities after the gettering process. When fabricated on the wafer front side underneath the epitaxial layer, the getter is brought closer to the wafer working regions as much as possible to provide the most effective gettering effect. At the same time, the epitaxial layer protects chemically active PS against all chemical attacks during device manufacturing. The buried PS getter may be designed as either the continuous or discontinuous layer configured as, for example, a pattern of insulating regions of VLSI. When properly adapted to the produced device conditions, the buried PS getter is shown to withstand successfully the whole VLSI production run providing advanced gain characteristics

Deposition of Erbium Containing Film in Porous Silicon from Ethanol Solution of Erbium Salt

Electrochemical treatment of porous silicon (PS) in ethanol solution of Er(NO3)3 was investigated to obtain material suitable for optoelectronic application. The voltammograms of n+-type and p-type PS vs. an Ag/AgCl reference electrode were examined and compared with these of a Pt electrode. The basic cathode reactions were marked out the voltammograms: (i) the formation and the adsorption of atomic hydrogen; (ii) the formation of molecular hydrogen; (iii) the electrolysis of water and ethanol. No zones relating to on electrochemical transitions of Er ions were revealed on the voltammograms. Nevertheless, with the cathode polarization, the formation of an Er-containing deposit was observed at the surface of the cathode. The IR and SIMS analysis were used to study the composition of the deposits. The scheme of the electrochemical and chemical reactions at the cathode is discussed

X-ray diffractometry of Si epilayers grown on porous silicon

X-ray double-crystal diffractometry was used to measure lattice deformation of porous silicon (PS) and Si epitaxial layers grown on PS. PS layers 1-10 m in thickness and 15-65% in porosity were formed by anodization of n+-type Sb doped Si wafers in the 12% HF aqueous solution. Lattice deformation of both PS and epitaxial layers are shown to strongly depend on PS porosity. Grown on uniform PS 40-60% in porosity, the epilayers, single-crystal as they are, display high lattice deformation and defect density. Epilayers grown on two-layer PS are comparable with the films grown on the n+-type single-crystal Si substrate

Gettering Technology Based on Porous Silicon

This paper briefly reviews a gettering technology based on porous silicon (PS). PS layers shown to have effective gettering properties for fast-diffusing impurities. Samples saturated with Au or Cu on which the PS layer made on the wafer backside, increases the generation lifetime of minority carriers from 0.05 - 0.1 mus to - 0.5 mus. The PS getter is demonstrated to be located either on the wafer backside or on the front side underneath an epitaxial layer. When formed on the wafer backside, the PS getter may be readily removed together with the absorbed impurities after the gettering process. When fabricated on the wafer front side underneath the epitaxial layer, the getter is brought closer to the wafer working regions as much as possible to provide the most effective gettering effect. At the same time, the epitaxial layer protects chemically active PS against all chemical attacks during the device manufacturing. The buried PS getter may be designed as either a continuous or discontinuous layer configured as, for example, a pattern of isolating regions in VLSI. When property adapted to the produced device conditions, the buried PS getter is shown to withstand successfully the whole VLSI production run providing advanced gain characteristics