Tuneable Capacitor based on dual picks profile of the sacrificial layer

In this paper, we present a novel dual gap tuneable capacitor process based on the profile of the sacrificial layer. This profile involves a tri-layer photo-resist process with only one mask level. This realization is based on a special profile of the sacrificial layer designed by two picks. The mechanism of the sacrificial layer realisation is dependent on resist thickness, resist formulation (viscosity, type of polymer and/or solvent, additives...), design of the patterned layer (size or width) and the conditions under which this layer is prepared: thermal treatment, etch back processes... In this communication we demonstrate influence of the later parameters and discuss how a dual pick profile was achieved.Comment: Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/EDA-Publishing

Extending B with Control Flow Breaks

This paper describes extensions of the B language concerning control ow breaks in implementations and speci cation of operations with exceptional behaviors. It does not claim to de ne those extensions in a pure formal and complete way. It is rather a presentation of what could be done and how it could be done. A syntax is proposed and proof obligations are de ned using a weakest precondition calculus extended to deal with abrupt termination. Examples emphasizing the advantages of these extensions are also given

Adaptable translator of B specifications to embedded C programs

Abstract. This paper presents the results of the RNTL BOM project, which aimed to develop an approach to generate efficient code from B formal developments. The target domain is smart card applications, in which memory and code size is an important factor. The results detailed in this paper are a new architecture of the translation process, a way to adapt the B0 language in order to include types of the target language and a set of validated optimizations. An assessment of the proposed approach is given through a case study, relative to the development of a Java Card Virtual Machine environment. Keywords. Code generation, embedded systems, B method, smart cards