Crystallinity of In-Ga-Zn-oxide (IGZO) in CAAC-IGZO vertical FET

Oxide semiconductor field-effect transistors (OSFETs) are actively developed [1]. In particular, there are many reports on a typical oxide semiconductor, In-Ga-Zn oxide (IGZO) [2]. An OSFET is fabricated with a planar structure in many cases; however, a vertical FET (VFET) with a current path perpendicular to a substrate can be fabricated with an area overhead comparable to one trench hole, and is gathering attention [3]. The VFET structure enables OSFETs to be highly integrated, and also allows the resolution of displays to be higher. Please click Download on the upper right corner to see the full abstract

Vertical oxide semiconductor field-effect transistor with extremely low off-state current

Oxide semiconductor field-effect transistors (OSFETs) are actively developed for display applications. An OSFET exhibits a lower off-state current than a silicon FET and enables low-frequency driving. We developed the measurement method and revealed the OSFET exhibits an extremely low off-state current [1]. In addition, we discovered a c-axis aligned crystalline indium-gallium-zinc oxide (CAAC-IGZO) which was unique crystal morphology [2]. A display with a backplane formed using CAAC-IGZO FETs achieves low power consumption owing to idling-stop driving that allows an extremely low refresh rate [3]. Please click Download on the upper right corner to see the full abstract

Low-power display system enabled by combining oxide semiconductor and neural network technologies

An oxide semiconductor (OS)-based field effect transistor (OSFET) exhibits the advantage of having an extremely low off-state current; moreover, the OSFET displays an off-state current that is ten orders of magnitude lower than that of a CMOS-FET [1]. Recently, numerous applications that harness this feature have been reported [2]. For instance, charge leakage from a data retention node of a pixel significantly decreases when the display incorporates OSFETs in its pixel circuit (OS display) [3, 4]. This minimizes degradation in the image quality when the displayed image is static despite using lower refresh rates. Consequently, the consumed power of the display driver circuit can be reduced by a large margin. This driving method is termed idling stop (IDS) driving. The OSFET’s low-leakage can also effectively enable a type of ULSICs that we term OS-large-scale integrated circuits (OSLSI) [5, 6]. Please click Additional Files below to see the full abstract

Effectiveness of <italic>c</italic>-Axis Aligned Crystalline IGZO FET as Selector Element and Ferroelectric Capacitor Scaling of 1T1C FeRAM

Aiming to reduce the area of a ferroelectric random access memory (FeRAM), we fabricated an FeRAM having a 1T1C configuration by using a ${c}$ -axis aligned crystalline In-Ga-Zn-O field-effect transistor, which we call OSFET, with a high breakdown voltage. A combination of the OSFET with ${L}/{W}$ of 60 nm/60 nm and a single damascene ferroelectric capacitor (FE-Cap) attained FE-Cap area reduction to $0.06~\mu \text{m}~^{\mathrm{ 2}}$ per cell. The FeRAM achieved a write time of 10 ns, a rewriting endurance of 109 cycles, and a data retention time of 100 min at 85&#x00B0;C. The OSFET is an optimal selector element for emerging memories