7 research outputs found

    R & D for collider beauty physics at the LHC

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    We propose an R&D program for the development of a Beauty trigger and innovative elements of the associated spectrometer. A series of short test runs is proposed at the SPS p-pbar Collider with the minimal spectrometer which will allow a credible B signal to be obtained in an invariant mass spectrum of reconstructed B mesons. The program builds on the success of the recent collider run of the P238 Collaboration, in which clean signals from beam-beam interactions were observed in a large silicon strip microvertex detector running 1.5 mm from the circulating beams. A continuing successful R&D program of the type proposed could ultimately lead to a collider experiment at the LHC to study CP Violation and rare B decays

    NEBULAS: a high performance data-driven event-building architecture based on an asynchronous self-routing packet-switching network

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    We propose a new approach to event building in future high rate experiments such as those at the LHC. We use a real-time, hierarchical event filtering paradigm based on pipelined triggering and data buffering at level 1, followed by farms of several hundreds of independent processors operating at level 2 and level 3. In view of the uncertainty in the rates and event sizes expected after the first level trigger in LHC experiments, it is important that data acquisition architectures can be open- endedly scaled to handle higher global bandwidths and accommodate more processors. We propose to apply the principle of self-routing packet-switching networks (currently under industrial development for telecommunications and multi-processor applications) to event building. We plan to implement a conceptually simple, distributed, asynchronous, data-driven, scalable, bottleneck-free architecture. An important feature of the architecture is that it can satisfy the data acquisition system's performance requirements using only a low-power, medium speed, inexpensive CMOS technology. Our development addresses related systems design issues, such as buffer management, destination control strategies, event and trigger resynchronization, base-line cancellation, and the use of asynchronous data pipelines
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