9 research outputs found

    Ultrashort Channel Silicon Nanowire Transistors with Nickel Silicide Source/Drain Contacts

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    We demonstrate the shortest transistor channel length (17 nm) fabricated on a vapor–liquid–solid (VLS) grown silicon nanowire (NW) by a controlled reaction with Ni leads on an in situ transmission electron microscope (TEM) heating stage at a moderate temperature of 400 °C. NiSi<sub>2</sub> is the leading phase, and the silicide–silicon interface is an atomically sharp type-A interface. At such channel lengths, high maximum on-currents of 890 (μA/μm) and a maximum transconductance of 430 (μS/μm) were obtained, which pushes forward the performance of bottom-up Si NW Schottky barrier field-effect transistors (SB-FETs). Through accurate control over the silicidation reaction, we provide a systematic study of channel length dependent carrier transport in a large number of SB-FETs with channel lengths in the range of 17 nm to 3.6 μm. Our device results corroborate with our transport simulations and reveal a characteristic type of short channel effects in SB-FETs, both in on- and off-state, which is different from that in conventional MOSFETs, and that limits transport parameter extraction from SB-FETs using conventional field-effect transconductance measurements

    Nucleation and Atomic Layer Reaction in Nickel Silicide for Defect-Engineered Si Nanochannels

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    At the nanoscale, defects can significantly impact phase transformation processes and change materials properties. The material nickel silicide has been the industry standard electrical contact of silicon microelectronics for decades and is a rich platform for scientific innovation at the conjunction of materials and electronics. Its formation in nanoscale silicon devices that employ high levels of strain, intentional, and unintentional twins or grain boundaries can be dramatically different from the commonly conceived bulk processes. Here, using in situ high-resolution transmission electron microscopy (HRTEM), we capture single events during heterogeneous nucleation and atomic layer reaction of nickel silicide at various crystalline boundaries in Si nanochannels for the first time. We show through systematic experiments and analytical modeling that unlike other typical face-centered cubic materials such as copper or silicon the twin defects in NiSi<sub>2</sub> have high interfacial energies. We observe that these twin defects dramatically change the behavior of new phase nucleation and can have direct implications for ultrascaled devices that are prone to defects or may utilize them to improve device performance

    Twin-Boundary Reduced Surface Diffusion on Electrically Stressed Copper Nanowires

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    Surface diffusion is intimately correlated with crystal orientation and surface structure. Fast surface diffusion accelerates phase transformation and structural evolution of materials. Here, through in situ transmission electron microscopy observation, we show that a copper nanowire with dense nanoscale coherent twin-boundary (CTB) defects evolves into a zigzag configuration under electric-current driven surface diffusion. The hindrance at the CTB-intercepted concave triple junctions decreases the effective surface diffusivity by almost 1 order of magnitude. The energy barriers for atomic migration at the concave junctions and different faceted surfaces are computed using density functional theory. We proposed that such a stable zigzag surface is shaped not only by the high-diffusivity facets but also by the stalled atomic diffusion at the concave junctions. This finding provides a defect-engineering route to develop robust interconnect materials against electromigration-induced failures for nanoelectronic devices

    Twin-Boundary Reduced Surface Diffusion on Electrically Stressed Copper Nanowires

    No full text
    Surface diffusion is intimately correlated with crystal orientation and surface structure. Fast surface diffusion accelerates phase transformation and structural evolution of materials. Here, through in situ transmission electron microscopy observation, we show that a copper nanowire with dense nanoscale coherent twin-boundary (CTB) defects evolves into a zigzag configuration under electric-current driven surface diffusion. The hindrance at the CTB-intercepted concave triple junctions decreases the effective surface diffusivity by almost 1 order of magnitude. The energy barriers for atomic migration at the concave junctions and different faceted surfaces are computed using density functional theory. We proposed that such a stable zigzag surface is shaped not only by the high-diffusivity facets but also by the stalled atomic diffusion at the concave junctions. This finding provides a defect-engineering route to develop robust interconnect materials against electromigration-induced failures for nanoelectronic devices

    Twin-Boundary Reduced Surface Diffusion on Electrically Stressed Copper Nanowires

    No full text
    Surface diffusion is intimately correlated with crystal orientation and surface structure. Fast surface diffusion accelerates phase transformation and structural evolution of materials. Here, through in situ transmission electron microscopy observation, we show that a copper nanowire with dense nanoscale coherent twin-boundary (CTB) defects evolves into a zigzag configuration under electric-current driven surface diffusion. The hindrance at the CTB-intercepted concave triple junctions decreases the effective surface diffusivity by almost 1 order of magnitude. The energy barriers for atomic migration at the concave junctions and different faceted surfaces are computed using density functional theory. We proposed that such a stable zigzag surface is shaped not only by the high-diffusivity facets but also by the stalled atomic diffusion at the concave junctions. This finding provides a defect-engineering route to develop robust interconnect materials against electromigration-induced failures for nanoelectronic devices

    Twin-Boundary Reduced Surface Diffusion on Electrically Stressed Copper Nanowires

    No full text
    Surface diffusion is intimately correlated with crystal orientation and surface structure. Fast surface diffusion accelerates phase transformation and structural evolution of materials. Here, through in situ transmission electron microscopy observation, we show that a copper nanowire with dense nanoscale coherent twin-boundary (CTB) defects evolves into a zigzag configuration under electric-current driven surface diffusion. The hindrance at the CTB-intercepted concave triple junctions decreases the effective surface diffusivity by almost 1 order of magnitude. The energy barriers for atomic migration at the concave junctions and different faceted surfaces are computed using density functional theory. We proposed that such a stable zigzag surface is shaped not only by the high-diffusivity facets but also by the stalled atomic diffusion at the concave junctions. This finding provides a defect-engineering route to develop robust interconnect materials against electromigration-induced failures for nanoelectronic devices

    Nanoscale Joule Heating and Electromigration Enhanced Ripening of Silver Nanowire Contacts

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    Solution-processed metallic nanowire thin film is a promising candidate to replace traditional indium tin oxide as the next-generation transparent and flexible electrode. To date however, the performance of these electrodes is limited by the high contact resistance between contacting nanowires; so improving the point contacts between these nanowires remains a major challenge. Existing methods for reducing the contact resistance require either a high processing power, long treatment time, or the addition of chemical reagents, which could lead to increased manufacturing cost and damage the underlying substrate or device. Here, a nanoscale point reaction process is introduced as a fast and low-power-consumption way to improve the electrical contact properties between metallic nanowires. This is achieved <i>via</i> current-assisted localized joule heating accompanied by electromigration. Localized joule heating effectively targets the high-resistance contact points between nanowires, leading to the automatic removal of surface ligands, welding of contacting nanowires, and the reshaping of the contact pathway between the nanowires to form a more desirable geometry of low resistance for interwire conduction. This result shows the interplay between thermal and electrical interactions at the highly reactive nanocontacts and highlights the control of the nanoscale reaction as a simple and effective way of turning individual metallic nanowires into a highly conductive interconnected nanowire network. The temperature of the adjacent device layers can be kept close to room temperature during the process, making this method especially suitable for use in devices containing thermally sensitive materials such as polymer solar cells

    Direct Measurement of Coherency Limits for Strain Relaxation in Heteroepitaxial Core/Shell Nanowires

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    The growth of heteroepitaxially strained semiconductors at the nanoscale enables tailoring of material properties for enhanced device performance. For core/shell nanowires (NWs), theoretical predictions of the coherency limits and the implications they carry remain uncertain without proper identification of the mechanisms by which strains relax. We present here for the Ge/Si core/shell NW system the first experimental measurement of critical shell thickness for strain relaxation in a semiconductor NW heterostructure and the identification of the relaxation mechanisms. Axial and tangential strain relief is initiated by the formation of periodic <i>a</i>/2 ⟨110⟩ perfect dislocations via nucleation and glide on {111} slip-planes. Glide of dislocation segments is directly confirmed by real-time in situ transmission electron microscope observations and by dislocation dynamics simulations. Further shell growth leads to roughening and grain formation which provides additional strain relief. As a consequence of core/shell strain sharing in NWs, a 16 nm radius Ge NW with a 3 nm Si shell is shown to accommodate 3% coherent strain at equilibrium, a factor of 3 increase over the 1 nm equilibrium critical thickness for planar Si/Ge heteroepitaxial growth

    Direct Measurement of Coherency Limits for Strain Relaxation in Heteroepitaxial Core/Shell Nanowires

    No full text
    The growth of heteroepitaxially strained semiconductors at the nanoscale enables tailoring of material properties for enhanced device performance. For core/shell nanowires (NWs), theoretical predictions of the coherency limits and the implications they carry remain uncertain without proper identification of the mechanisms by which strains relax. We present here for the Ge/Si core/shell NW system the first experimental measurement of critical shell thickness for strain relaxation in a semiconductor NW heterostructure and the identification of the relaxation mechanisms. Axial and tangential strain relief is initiated by the formation of periodic <i>a</i>/2 ⟨110⟩ perfect dislocations via nucleation and glide on {111} slip-planes. Glide of dislocation segments is directly confirmed by real-time in situ transmission electron microscope observations and by dislocation dynamics simulations. Further shell growth leads to roughening and grain formation which provides additional strain relief. As a consequence of core/shell strain sharing in NWs, a 16 nm radius Ge NW with a 3 nm Si shell is shown to accommodate 3% coherent strain at equilibrium, a factor of 3 increase over the 1 nm equilibrium critical thickness for planar Si/Ge heteroepitaxial growth
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