Dense Vertically Aligned Copper Nanowire Composites as High Performance Thermal Interface Materials

Thermal interface materials (TIMs) are essential for managing heat in modern electronics, and nanocomposite TIMs can offer critical improvements. Here, we demonstrate thermally conductive, mechanically compliant TIMs based on dense, vertically aligned copper nanowires (CuNWs) embedded into polymer matrices. We evaluate the thermal and mechanical characteristics of 20–25% dense CuNW arrays with and without polydimethylsiloxane infiltration. The thermal resistance achieved is below 5 mm² K W^–1, over an order of magnitude lower than commercial heat sink compounds. Nanoindentation reveals that the nonlinear deformation mechanics of this TIM are influenced by both the CuNW morphology and the polymer matrix. We also implement a flip–chip bonding protocol to directly attach CuNW composites to copper surfaces, as required in many thermal architectures. Thus, we demonstrate a rational design strategy for nanocomposite TIMs that simultaneously retain the high thermal conductivity of aligned CuNWs and the mechanical compliance of a polymer

Thermal Conduction across Metal–Dielectric Sidewall Interfaces

The heat flow at the interfaces of complex nanostructures is three-dimensional in part due to the nonplanarity of interfaces. One example common in nanosystems is the situation when a significant fraction of the interfacial area is composed of sidewalls that are perpendicular to the principal plane, for example, in metallization structures for complementary metal-oxide semiconductor transistors. It is often observed that such sidewall interfaces contain significantly higher levels of microstructural disorder, which impedes energy carrier transport and leads to effective increases in interfacial resistance. The impact of these sidewall interfaces needs to be explored in greater depth for practical device engineering, and a related problem is that appropriate characterization techniques are not available. Here, we develop a novel electrothermal method and an intricate microfabricated structure to extract the thermal resistance of a sidewall interface between aluminum and silicon dioxide using suspended nanograting structures. The thermal resistance of the sidewall interface is measured to be ∼16 ± 5 m² K GW^–1, which is twice as large as the equivalent horizontal planar interface comprising the same materials in the experimental sample. The rough sidewall interfaces are observed using transmission electron micrographs, which may be more extensive than at interfaces in the substrate plan in the same nanostructure. A model based on a two-dimensional sinusoidal surface estimates the impact of the roughness on thermal resistance to be ∼2 m² K GW^–1. The large disparity between the model predictions and the experiments is attributed to the incomplete contact at the Al–SiO₂ sidewall interfaces, inferred by observation of underetching of the silicon substrate below the sidewall opening. This study suggests that sidewall interfaces must be considered separately from planar interfaces in thermal analysis for nanostructured systems

Thermal Conduction in Vertically Aligned Copper Nanowire Arrays and Composites

The ability to efficiently and reliably transfer heat between sources and sinks is often a bottleneck in the thermal management of modern energy conversion technologies ranging from microelectronics to thermoelectric power generation. These interfaces contribute parasitic thermal resistances that reduce device performance and are subjected to thermomechanical stresses that degrade device lifetime. Dense arrays of vertically aligned metal nanowires (NWs) offer the unique combination of thermal conductance from the constituent metal and mechanical compliance from the high aspect ratio geometry to increase interfacial heat transfer and device reliability. In the present work, we synthesize copper NW arrays directly onto substrates via templated electrodeposition and extend this technique through the use of a sacrificial overplating layer to achieve improved uniformity. Furthermore, we infiltrate the array with an organic phase change material and demonstrate the preservation of thermal properties. We use the 3ω method to measure the axial thermal conductivity of freestanding copper NW arrays to be as high as 70 W m^–1 K^–1, which is more than an order of magnitude larger than most commercial interface materials and enhanced-conductivity nanocomposites reported in the literature. These arrays are highly anisotropic, and the lateral thermal conductivity is found to be only 1–2 W m^–1 K^–1. We use these measured properties to elucidate the governing array-scale transport mechanisms, which include the effects of morphology and energy carrier scattering from size effects and grain boundaries

Ultrafast Characterization of Phase-Change Material Crystallization Properties in the Melt-Quenched Amorphous Phase

Phase change materials are widely considered for application in nonvolatile memories because of their ability to achieve phase transformation in the nanosecond time scale. However, the knowledge of fast crystallization dynamics in these materials is limited because of the lack of fast and accurate temperature control methods. In this work, we have developed an experimental methodology that enables ultrafast characterization of phase-change dynamics on a more technologically relevant melt-quenched amorphous phase using practical device structures. We have extracted the crystallization growth velocity (<i>U</i>) in a functional capped phase change memory (PCM) device over 8 orders of magnitude (10^–10 < <i>U</i> < 10^–1 m/s) spanning a wide temperature range (415 < <i>T</i> < 580 K). We also observed direct evidence of non-Arrhenius crystallization behavior in programmed PCM devices at very high heating rates (>10⁸ K/s), which reveals the extreme fragility of Ge₂Sb₂Te₅ in its supercooled liquid phase. Furthermore, these crystallization properties were studied as a function of device programming cycles, and the results show degradation in the cell retention properties due to elemental segregation. The above experiments are enabled by the use of an on-chip fast heater and thermometer called as microthermal stage (MTS) integrated with a vertical phase change memory (PCM) cell. The temperature at the PCM layer can be controlled up to 600 K using MTS and with a thermal time constant of 800 ns, leading to heating rates ∼10⁸ K/s that are close to the typical device operating conditions during PCM programming. The MTS allows us to independently control the electrical and thermal aspects of phase transformation (inseparable in a conventional PCM cell) and extract the temperature dependence of key material properties in real PCM devices

Phonon Dominated Heat Conduction Normal to Mo/Si Multilayers with Period below 10 nm

Thermal conduction in periodic multilayer composites can be strongly influenced by nonequilibrium electron–phonon scattering for periods shorter than the relevant free paths. Here we argue that two additional mechanismsquasiballistic phonon transport normal to the metal film and inelastic electron-interface scatteringcan also impact conduction in metal/dielectric multilayers with a period below 10 nm. Measurements use the 3ω method with six different bridge widths down to 50 nm to extract the in- and cross-plane effective conductivities of Mo/Si (2.8 nm/4.1 nm) multilayers, yielding 15.4 and 1.2 W/mK, respectively. The cross-plane thermal resistance is lower than can be predicted considering volume and interface scattering but is consistent with a new model built around a film-normal length scale for phonon–electron energy conversion in the metal. We introduce a criterion for the transition from electron to phonon dominated heat conduction in metal films bounded by dielectrics

Direct Visualization of Thermal Conductivity Suppression Due to Enhanced Phonon Scattering Near Individual Grain Boundaries

Understanding the impact of lattice imperfections on nanoscale thermal transport is crucial for diverse applications ranging from thermal management to energy conversion. Grain boundaries (GBs) are ubiquitous defects in polycrystalline materials, which scatter phonons and reduce thermal conductivity (κ). Historically, their impact on heat conduction has been studied indirectly through spatially averaged measurements, that provide little information about phonon transport near a single GB. Here, using spatially resolved time-domain thermoreflectance (TDTR) measurements in combination with electron backscatter diffraction (EBSD), we make localized measurements of κ within few μm of individual GBs in boron-doped polycrystalline diamond. We observe strongly suppressed thermal transport near GBs, a reduction in κ from ∼1000 W m^–1 K^–1 at the center of large grains to ∼400 W m^–1 K^–1 in the immediate vicinity of GBs. Furthermore, we show that this reduction in κ is measured up to ∼10 μm away from a GB. A theoretical model is proposed that captures the local reduction in phonon mean-free-paths due to strongly diffuse phonon scattering at the disordered grain boundaries. Our results provide a new framework for understanding phonon–defect interactions in nanomaterials, with implications for the use of high-κ polycrystalline materials as heat sinks in electronics thermal management

Temperature-Dependent Thermal Boundary Conductance of Monolayer MoS₂ by Raman Thermometry

The electrical and thermal behavior of nanoscale devices based on two-dimensional (2D) materials is often limited by their contacts and interfaces. Here we report the temperature-dependent thermal boundary conductance (TBC) of monolayer MoS₂ with AlN and SiO₂, using Raman thermometry with laser-induced heating. The temperature-dependent optical absorption of the 2D material is crucial in such experiments, which we characterize here for the first time above room temperature. We obtain TBC ∼ 15 MW m^–2 K^–1 near room temperature, increasing as ∼ <i>T</i>^0.65 in the range 300−600 K. The similar TBC of MoS₂ with the two substrates indicates that MoS₂ is the “softer” material with weaker phonon irradiance, and the relatively low TBC signifies that such interfaces present a key bottleneck in energy dissipation from 2D devices. Our approach is needed to correctly perform Raman thermometry of 2D materials, and our findings are key for understanding energy coupling at the nanoscale

High Thermal Conductivity of Submicrometer Aluminum Nitride Thin Films Sputter-Deposited at Low Temperature

Aluminum nitride (AlN) is one of the few electrically insulating materials with excellent thermal conductivity, but high-quality films typically require exceedingly hot deposition temperatures (>1000 °C). For thermal management applications in dense or high-power integrated circuits, it is important to deposit heat spreaders at low temperatures (<500 °C), without affecting the underlying electronics. Here we demonstrate 100 nm to 1.7 μm thick AlN films achieved by low-temperature (<100 °C) sputtering, correlating their thermal properties with their grain size and interfacial quality, which we analyze by X-ray diffraction, transmission X-ray microscopy, as well as Raman and Auger spectroscopy. Controlling the deposition conditions through the partial pressure of reactive N2, we achieve an ∼3× variation in thermal conductivity (∼36–104 W m–1 K–1) of ∼600 nm films, with the upper range representing one of the highest values for such film thicknesses at room temperature, especially at deposition temperatures below 100 °C. Defect densities are also estimated from the thermal conductivity measurements, providing insight into the thermal engineering of AlN that can be optimized for application-specific heat spreading or thermal confinement