3 research outputs found

    Compiling an Interpreted Processing Language : Improving Performance in a Large Telecommunication System

    No full text
    In this report we evaluate different techniques for increasing the performance of an interpreted processing language in a telecommunication system, called Billing Gateway R8. We have implemented a prototype in which we first translate the language into C++ code, and then compile it using a C++ compiler. In our prototype we experienced a threefold increase in processing throughput, compared to the original system, when running on a Symmetric Multi Processor with four CPU:s that were under full load. The prototype also showed better scalability than Billing Gateway R8, due to less use of dynamic memory management

    Compiling an Interpreted Processing Language : Improving Performance in a Large Telecommunication System

    No full text
    In this report we evaluate different techniques for increasing the performance of an interpreted processing language in a telecommunication system, called Billing Gateway R8. We have implemented a prototype in which we first translate the language into C++ code, and then compile it using a C++ compiler. In our prototype we experienced a threefold increase in processing throughput, compared to the original system, when running on a Symmetric Multi Processor with four CPU:s that were under full load. The prototype also showed better scalability than Billing Gateway R8, due to less use of dynamic memory management

    Improving Multiprocessor Performance of a Large Telecommunication System by Replacing Interpretation with Compilation

    No full text
    In this report we consider different techniques for increasing the multiprocessor performance of an interpreted processing language in a large real-time telecommunication system, called Billing Gateway. We have implemented a prototype in which we first translate the language into C++ code, and then compile it using a C++ compiler. In our prototype we experienced a more than fourfold increase in throughput, compared to the original system, when running on an SMP with eight CPUs. The prototype also showed better scalability tha
    corecore