Peak power reduction and workload balancing by space-time multiplexing based demand-supply matching for 3D thousand-core microprocessor

Space-time multiplexing is utilized for demand-supply matching between many-core microprocessors and power converters. Adaptive clustering is developed to classify cores by similar power level in space and similar power behavior in time. In each power management cycle, minimum number of power converters are allocated for space-time multiplexed matching, which is physically enabled by 3D through-silicon-vias. Moreover, demand-response based task adjustment is applied to reduce peak power and to balance workload. The proposed power management system is verified by system models with physical design parameters and benched power traces, which show 38.10% peak power reduction and 2.60x balanced workload.Accepted versio

A highly-parallel and energy-efficient 3D multi-layer CMOS-RRAM accelerator for tensorized neural network

It is a grand challenge to develop highly parallel yet energy-efficient machine learning hardware accelerator. This paper introduces a three-dimensional (3-D) multilayer CMOSRRAM accelerator for atensorized neural network. Highly parallel matrix-vector multiplication can be performed with low power in the proposed 3-D multilayer CMOS-RRAM accelerator. The adoption of tensorization can significantly compress the weight matrix of a neural network using much fewer parameters. Simulation results using the benchmark MNIST show that the proposed accelerator has 1.283× speed-up, 4.276× energy-saving, and 9.339× area-saving compared to the 3-D CMOS-ASIC implementation; and 6.37× speed-up and 2612× energy-saving compared to 2-D CPU implementation. In addition, 14.85× model compression can be achieved by tensorization with acceptable accuracy loss.NRF (Natl Research Foundation, S’pore)MOE (Min. of Education, S’pore)Accepted versio

Preparation of Antimony Sulfide and Enrichment of Gold by Sulfuration–Volatilization from Electrodeposited Antimony

Electrodeposited antimony can be treated with sulfuration–volatilization technology, which causes antimony to volatilize in the form of antimony sulfide. During this process, gold is enriched in the residue, thereby realizing the value-added use of antimony and the recovery of gold. In this study, the thermodynamic conditions of antimony sulfide were analyzed by the Clausius–Clapeyron equation. Moreover, the volatilization behavior of antimony sulfide and the enrichment law of gold were studied by heat volatilization experiments. The effects of the sulfide temperature and volatilization pressure on the separation efficiency of antimony and gold enrichment were investigated. The results demonstrate that the sulfuration rate was the highest, namely 96.06%, when the molar ratio of sulfur to antimony was 3:1, the sulfur source temperature was 400 °C, the antimony source temperature was 550 °C, and the sulfuration time was 30 min. Antimony sulfide prepared under these conditions was volatilized at 800 °C over 2 h at an evaporation pressure of 0.2 atm, and the volatilization rate was the highest, namely 92.81%. Antimony sulfide with a stibnite structure obtained from the sulfuration–volatilization treatment of electrodeposited antimony meets the ideal stoichiometric ratio of sulfur and antimony in Sb2S3 (3:2), and gold is enriched in the residue

Vacuum Electrodeposition of Cu(In, Ga)Se₂ Thin Films and Controlling the Ga Incorporation Route

The traditional electrochemical deposition process used to prepare Cu(In, Ga)Se2 (CIGS) thin films has inherent flaws, such as the tendency to produce low-conductivity Ga2O3 phase and internal defects. In this article, CIGS thin films were prepared under vacuum (3 kPa), and the mechanism of vacuum electrodeposition CIGS was illustrated. The route of Ga incorporation into the thin films could be controlled in a vacuum environment via inhibiting pH changes at the cathode region. Through the incorporation of a low-conductivity secondary phase, Ga2O3 was inhibited at 3 kPa, as shown by Raman and X-ray photoelectron spectroscopy. The preparation process used a higher current density and a lower diffusion impedance and charge transfer impedance. The films that were produced had larger particle sizes

A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os

One memory-logic-integration design platform is developed in this paper with thermal reliability analysis provided for 2.5D through-silicon-interposer (TSI) and 3D through-silicon-via (TSV) based integrations. Temperature-dependent delay and power models have been developed at microarchitecture level for 2.5D and 3D integrations of many-core microprocessors and main memory, respectively. Experiments are performed by general-purpose benchmarks from SPEC CPU2006 and also cloud-oriented benchmarks from Phoenix with the following observations. The memory-logic integration by 3D RC-interconnected TSV I/Os can result in thermal runaway failures due to strong electrical-thermal couplings. On the other hand, the one by 2.5D transmission-line-interconnected TSI I/Os has shown almost the same energy efficiency and better thermal resilience.Accepted versio