24 research outputs found

    An open interface for parallelization of traffic simulation

    Get PDF
    In this paper, we present the implementation of a parallel road traffic simulation using the concept of Lane Cut Points (LCPs) in the Spider programming environment. LCPs are storage buffers inserted into lane data structures at the road network partition edges. Vehicles enter a partition at the edges from an LCP and exit a partition edge into an LCP at the end of every simulation step. Spider, a parallel programming environment, which runs on PVM, coordinates the execution of the parallel traffic simulation

    High performance parallel simulation of telecommunication networks

    No full text
    The paper describes techniques used to obtain stable high performance from parallel simulation of large telecommunication networks. A basic parallel simulation model of a telecommunication network and the conservative implementation of the model are discussed and the experimental results on the performance of the simulator are examined

    Real Time Speed of a Conservative Parallel Simulation

    No full text
    This paper examines the real time speed of the conservative  parallel simulation of a telecommunications network. Real time speed is defined as the ratio of the simulated time to the execution time. A generic simulation model of SS7 networks is executed under the conservative mechanism. A technique used to secure a stable lower bound on the  speed of the SS7 simulator is introduced and analyzed. Using this technique  simulation models ranging in size, from 16 to 64 nodes, are executed on similarly sized and  configured transputer networks. Empirical data on the real time performance of the system are presented. The results confirm that under the given conditions, the performance boundaries of the simulator are both stable and scalable: independent of work load density and size of the modeled network, simulation of a given period of model activity can be guaranteed within a predetermined period of real time

    HIPERTRANS: High performance transport network modelling and simulation

    No full text
    HIPERTRANS (High Performance Transport network modelling and Simulation) is a fast and visually representative simulator that can predict traffic on a given urban road network. It was designed using object-oriented techniques and by re-engineering established road traffic models. It has the capability of interfacing to a range of UTC (urban traffic control) systems. Its high performance version was implemented by using a novel parallel programming platform called SPIDER; it has the capability of executing faster than real time and runs on distributed processors. The simulator provides a powerful GUI (graphical user interface) for entering road network models, configuring simulation runs, and visualising simulation results. The system provides helpful traffic diagnostic tools enabling local transport authorities, policy makers, researchers, and UTC manufacturers to gainfully exploit its functionality. The HIPERTRANS project was funded by the European Commission under the 4th Framework programme

    From BSP to a Virtual von Neumann machine

    No full text

    From BSP to a virtual von Neumann machine

    No full text
    The BSP (bulk synchronous parallel) architecture incorporates a scalable and transparent communication model. The task-level synchronisation mechanism of the machine, however, is not transparent to the user and can be inefficient when applied to the co-ordination of irregular parallelism. This article presents a discussion of an alternative memory-level scheme which offers the prospect of achieving both efficient and transparent synchronisation. The scheme, based on a discrete-event simulation paradigm, supports a sequential style of programming and, coupled with the BSP communication model, leads to the emergence of a virtual von Neumann parallel computer

    The parallelisation of discrete-event simulation: a methodology

    No full text
    Parallel computing has provided the opportunity to perform high speed simulation. However, no guidelines exist for parallelizing discrete event simulation. This presents a barrier to the use of such techniques and the benefits of reduced simulation times. A methodology has therefore been developed to guide the novice in developing a parallel form of existing simulations. Using an illustrative example, this paper discusses the problems of parallelizing discrete event simulation and concludes with a summary of a methodology
    corecore