Complementary operation.

<p>Schematic diagram of the MSET for different magnetization orientations. (a) <i>ϕ</i> = 0° the magnetization is in-plane and (b) <i>ϕ</i> = 90° the magnetization is out-of-plane. (c) Coulomb blockade oscillations as a function of the direction of the back-gate voltage <i>V</i>_<i>gs</i> and the applied magnetic field orientation <i>ϕ</i> for B = 0.7 T. The-dashed blue and red lines indicate the operating points. (d) MSET Ids-Vgs transfer function at <i>ϕ</i> = 0°. The logic 0 (1) has been selected at a low (high) current level, n-type SET. (e) MSET Ids-Vgs transfer function at <i>ϕ</i> = 90°. The logic outputs have been inverted, p-type SET.</p

Single-device logic.

<p>(a) <i>V</i>_<i>ds</i> − <i>V</i>_<i>gs</i> map of the drain current for <i>ϕ</i> = 0° showing the characteristic Coulomb diamonds. Red and blue frames sketch the implemented logic gates for <i>ϕ</i> = 0° and 90° respectively. (b-c) AND-OR set of reprogrammable logic gates. AND gate implemented at <i>ϕ</i> = 0° (b) and OR gate at <i>ϕ</i> = 90° (c) with <i>V</i>_<i>ds</i> (input A) 0(1) defined as −132(−220) <i>μ</i>V and <i>V</i>_<i>gs</i> (input B) 0(1) defined as −96(0) <i>μ</i>V. (d-e) NAND-NOR set of reprogrammable logic gates. NAND gate implemented at <i>ϕ</i> = 0° (d) and NOR gate at <i>ϕ</i> = 90° (e) with <i>V</i>_<i>sd</i> (input A) 0(1) defined as 220(132) <i>μ</i>V and <i>V</i>_<i>gs</i> (input B) 0(1) defined as 128(224) <i>μ</i>V.</p

Logic at the multiple device level considering identical SETs and the logic inputs defined in Fig 2.

<p>The inputs A and B are defined as taken as the SET gate values. (a) A series pull-down network performs the OR operation at <i>ϕ</i> = 0° and NAND at <i>ϕ</i> = 90°. (b) Parallel pull-down network performs the AND operation at <i>ϕ</i> = 0° and NOR at <i>ϕ</i> = 90°.</p

Device structure.

<p>(a) Schematic cross-section of the device sketching the magnetization orientation of the (Ga,Mn)As back-gate layer. (b) SEM image of the device. The aluminium island is separated from the source and drain leads by AlO_<i>x</i> tunnel junctions. Side gates were not used in this experiment. (c) Drain current (<i>I</i>_<i>ds</i>) oscillations as a function of the back gate voltage (<i>V</i>_<i>gs</i>).</p