Initial Kernel Timing Using a Simple PIM Performance Model

This presentation will describe some initial results of paper-and-pencil studies of 4 or 5 application kernels applied to a processor-in-memory (PIM) system roughly similar to the Cascade Lightweight Processor (LWP). The application kernels are: * Linked list traversal * Sun of leaf nodes on a tree * Bitonic sort * Vector sum * Gaussian elimination The intent of this work is to guide and validate work on the Cascade project in the areas of compilers, simulators, and languages. We will first discuss the generic PIM structure. Then, we will explain the concepts needed to program a parallel PIM system (locality, threads, parcels). Next, we will present a simple PIM performance model that will be used in the remainder of the presentation. For each kernel, we will then present a set of codes, including codes for a single PIM node, and codes for multiple PIM nodes that move data to threads and move threads to data. These codes are written at a fairly low level, between assembly and C, but much closer to C than to assembly. For each code, we will present some hand-drafted timing forecasts, based on the simple PIM performance model. Finally, we will conclude by discussing what we have learned from this work, including what programming styles seem to work best, from the point-of-view of both expressiveness and performance

A Multidisciplinary Optimization Approach to Integrated Circuit Design

In this paper, we investigate potential applications of multidisciplinary design optimization (MDO) algorithms to integrated circuit design. These algorithms use global sensitivity equations as a tool that provides for a temporary decoupling of the constituent subsystems of a complex system so that designers with expertise in different disciplines can design the subsystems. We develop two example design problems, one with hierarchically coupled subsystems and one with non-hierarchically coupled subsystems, to which we apply multidisciplinary optimization: (1) An example of joint process-circuit optimization, in which a semiconductor fabrication process is tuned concurrently with the design of a CMOS circuit, and (2) an example of circuit -thermal design, in which cell placement and cell design are done simultaneously with regard to the temperature effects on circuit performances. We discuss how this approach enables efficient and concurrent optimization of integrated circuits. 1.0 Intr..

Measurement and Analysis of Sequential Design Processes

this paper we describe the development of an analytical approach for evaluating sequential design process completion time and for determining the sensitivities of design time with respect to individual task durations and transition probabilities. Techniques are also detailed for collecting process metadata and calibrating a design process model. Example applications illustrate the use of the methodology in analyzing and improving software and hardware design processes. Categories and Subject Descriptors: J.6 [Computer Applications]: Computer-Aided Engineering - computer-aided design; K.3.2 [Computers and Education]: Computer and Information Science Education - self-assessmen

Incorporating Design Schedule Management into a Design Flow Management System

Although the successful completion of a design involves both schedule and task or flow management, CAD execution environments are typically divorced from schedule planning systems. A disadvantage of using two systems is the inefficient communication that occurs between the systems. In this paper we present an approach to incorporate design schedule management into a design flow management system. Since design flow systems provide a model for describing activities or events, a schedule model can be readily incorporated into the systems based on the flow system structure. The basis of our approach is to derive a design schedule from the simulation of a flow execution. Actual flow execution is then tracked against the schedule. We verify our approach by implementing a design scheduling component based on this model into the Hercules Task Management System. 1.0 Introduction As designs continue to grow in size and increase in complexity, the time needed to take a design from concept to pro..

The case for processingin-memory

Abstract: The conventional approach to computer design has been to couple the fastest possible processor with the cheapest, densest memory. Because of the widening gap, however, between the bandwidth that processors demand and that memories can supply, such architectures are reaching their limits. One approach to bridging this gap is moving the processor onto the memory chip. Not only can processing-in-memory, or PIM, lead to improved performance but it may do so with significant reductions in complexity, area, and power. In this article, we first review trends in processor and memory performance, and show how much of the bandwidth currently available in DRAMs is literally thrown away. Next, we discuss the architectural spectrum of PIM designs, with examples of actual chips, and show how the memory “hidden bandwidth ” can be reclaimed. Finally, we present technology and design methodology challenges for implementing PIMs, and conclude with future directions

A Methodology for Concurrent Fabrication Process/Cell Library Optimization

Abstract -This paper presents a methodology for concurrently optimizing an IC fabrication process and a standard cell library in order to maximize overall yield. The approach uses the Concurrent Subspace Optimization (CSSO) algorithm, which has been developed for general coupled, multidisciplinary optimization problems. An example is provided showing the application of the algorithm to optimizing a mixed analog-digital library on a CMOS process

Flow Designer's Workbench

by Shannon Kay Kuntz In today's highly-competitive market, it is imperative not only to deliver products that work, but also to deliver them on time. To meet these twin goals it is as important to monitor and improve the performance of design processes as it is to improve the performance of the products themselves. To address this need, I have developed an integrated system for the management, measurement, and analysis of design processes. This system assists in managing the complexity of the design process through design process specification, execution management, and tool integration. In addition, it provides tools and techniques for the efficient collection and storage of information about the design process and analysis tools for post-design analysis of the design process including the calculation of design process completion time and completion time sensitivities as well as the visualization of design process execution. ii LIST OF FIGURES.........................................