Synthesis and Characterizations of Ternary InGaAs Nanowires by a Two-Step Growth Method for High-Performance Electronic Devices

InAs nanowires have been extensively studied for high-speed and high-frequency electronics due to the low effective electron mass and corresponding high carrier mobility. However, further applications still suffer from the significant leakage current in InAs nanowire devices arising from the small electronic band gap. Here, we demonstrate the successful synthesis of ternary InGaAs nanowires in order to tackle this leakage issue utilizing the larger band gap material but at the same time not sacrificing the high electron mobility. In this work, we adapt a two-step growth method on amorphous SiO₂/Si substrates which significantly reduces the kinked morphology and surface coating along the nanowires. The grown nanowires exhibit excellent crystallinity and uniform stoichiometric composition along the entire length of the nanowires. More importantly, the electrical properties of those nanowires are found to be remarkably impressive with <i>I</i>_ON/<i>I</i>_OFF ratio >10⁵, field-effect mobility of ∼2700 cm²/(V·s), and ON current density of ∼0.9 mA/μm. These nanowires are then employed in the contact printing and achieve large-scale assembly of nanowire parallel arrays which further illustrate the potential for utilizing these high-performance nanowires on substrates for the fabrication of future integrated circuits

Controllable p–n Switching Behaviors of GaAs Nanowires <i>via</i> an Interface Effect

Due to the extraordinary large surface-to-volume ratio, surface effects on semiconductor nanowires have been extensively investigated in recent years for various technological applications. Here, we present a facile interface trapping approach to alter electronic transport properties of GaAs nanowires as a function of diameter utilizing the acceptor-like defect states located between the intrinsic nanowire and its amorphous native oxide shell. Using a nanowire field-effect transistor (FET) device structure, p- to n-channel switching behaviors have been achieved with increasing NW diameters. Interestingly, this oxide interface is shown to induce a space-charge layer penetrating deep into the thin nanowire to deplete all electrons, leading to inversion and thus p-type conduction as compared to the thick and intrinsically n-type GaAs NWs. More generally, all of these might also be applicable to other nanowire material systems with similar interface trapping effects; therefore, careful device design considerations are required for achieving the optimal nanowire device performances

Stoichiometric Effect on Electrical, Optical, and Structural Properties of Composition-Tunable In_<i>x</i>Ga_1–<i>x</i>As Nanowires

Ternary InGaAs nanowires have recently attracted extensive attention due to their superior electron mobility as well as the ability to tune the band gap for technological applications ranging from high-performance electronics to high-efficiency photovoltaics. However, due to the difficulties in synthesis, there are still considerable challenges to assess the correlation among electrical, optical, and structural properties of this material system across the entire range of compositions. Here, utilizing a simple two-step growth method, we demonstrate the successful synthesis of composition and band gap tunable In_<i>x</i>Ga_1–<i>x</i>As alloy nanowires (average diameter = 25–30 nm) by manipulating the source powder mixture ratio and growth parameters. The lattice constants of each NW composition have been well correlated with the chemical stoichiometry and confirmed by high-resolution transmission electron microscopy and X-ray diffraction. Importantly, the as-grown NWs exhibit well-controlled surface morphology and low defect concentration without any phase segregation in all stoichiometric compositions. Moreover, it is found that the electrical nanowire device performances such as the turn-off and <i>I</i>_ON<i>/I</i>_OFF ratios are improved when the In concentration decreases at a cost of mobility degradation. More generally, this work suggests that a careful stoichiometric design is required for achieving optimal nanowire device performances

Manipulated Growth of GaAs Nanowires: Controllable Crystal Quality and Growth Orientations via a Supersaturation-Controlled Engineering Process

Controlling the crystal quality and growth orientation of high performance III–V compound semiconductor nanowires (NWs) in a large-scale synthesis is still challenging, which could restrict the implementation of nanowires for practical applications. Here we present a facile approach to control the crystal structure, defects, orientation, growth rate and density of GaAs NWs via a supersaturation-controlled engineering process by tailoring the chemical composition and dimension of starting Au_<i>x</i>Ga_<i>y</i> catalysts. For the high Ga supersaturation (catalyst diameter < 40 nm), NWs can be manipulated to grow unidirectionally along ⟨111⟩ with the pure zinc blende phase with a high growth rate, density and minimal amount of defect concentration utilizing the low-melting-point catalytic alloys (AuGa, Au₂Ga, and Au₇Ga₃ with Ga atomic concentration > 30%), whereas for the low Ga supersaturation (catalyst diameter > 40 nm), NWs are grown inevitably with a mixed crystal orientation and high concentration of defects from high-melting-point alloys (Au₇Ga₂ with Ga atomic concentration < 30%). In addition to the complicated control of processing parameters, the ability to tune the composition of catalytic alloys by tailoring the starting Au film thickness demonstrates a versatile approach to control the crystal quality and orientation for the uniform NW growth