Using gradient information to enhance the Progressive Probabilistic Hough Transform

In this paper we look at the benefits to be gained in using gradient information to enhance the progressive probabilistic Hough transform (PPHT). It is shown how using the angle information in controlling the voting process and in assigning pixels correctly to a line, PPHT's performance can be significantly improved. The improved algorithm gives results very close to that of the Standard Hough transform, but requires significantly less computation

Gradient based progressive probabilistic Hough transform

The authors look at the benefits of exploiting gradient information to enhance the progressive probabilistic Hough transform (PPHT). It is shown that using the angle information in controlling the voting process and in assigning pixels to a line, the PPHT performance can be significantly improved. The performance gains are assessed in terms of repeatability of results, a measure that has direct relevance for its use in many applications, The overall improvement in output quality is shown to be greater than that found for the standard Hough transform using the same information. The improved algorithm gives results very close to those of the standard Hough transform, but requires significantly less computation

Progressive Probabilistic Hough Transform for line detection

We present a novel Hough Transform algorithm referred to as Progressive Probabilistic Hough Transform (PPHT). Unlike the Probabilistic HT where Standard HT is performed on a pre-selected fraction of input points, PPHT minimises the amount of computation needed to detect lines by exploiting the difference an the fraction of votes needed to detect reliably lines with different numbers of supporting points. The fraction of points used for voting need not be specified ad hoc or using a priori knowledge, as in the probabilistic HT; it is a function of the inherent complexity of the input data. The algorithm is ideally suited for real-time applications with a fixed amount of available processing time, since voting and line detection is interleaved. The most salient features are likely to be detected first. Experiments show that in many circumstances PPHT has advantages over the Standard HT

Un paisaje de la literatura carcelaria: San Marcos de León en la obra de Quevedo

Francisco de Quevedo se hizo eco en parte de su epistolario de su experiencia carcelaria vivida en el otoño de sus días en San Marcos de León. En dicho epistolario mostró su visión más íntima y personal del fatídico episodio. El resultado fue una literatura ubicada en las lábiles fronteras entre la verdad y la ficción biográficas; una literatura surgida como una especie de conjura contra la cárcel. El epistolario de Quevedo —como la literatura carcelaria y la literatura del exilio— es una rebeldía contra el olvido y una forma de rebeldía contra el poder político. Del mismo modo que Ovidio hiciera con su experiencia del exilio, Quevedo supo transformar su peripecia vital en San Marcos en una poética de literatura carcelaria

Automatic FPGA based implementation of a classification tree

We propose a method of automatic hardware implementation of a decision rule based on the Adaboost algorithm. We review the principles of the classification method and we evaluate its hardware implementation cost in term of FPGA’s slice, using different weak classifiers based on the general concept of hyperrectangle. We show how to combine the weak classifiers in order to find a good trade-off between classification performances and hardware implementation cost. We present results obtained using examples coming from UCI databases

Robust symmetric multiplication for programmable analog VLSI array processing

This paper presents an electrically programmable analog multiplier. The circuit performs the multiplication between an input variable and an electrically selectable scaling factor. The multiplier is divided in several blocks: a linearized transconductor, binary weighted current mirrors and a differential to single-ended current adder. This paper shows the advantages introduced using a linearized OTA-based multiplier. The circuit presented renders higher linearity and symmetry in the output current than a previously reported single-transistor multiplier. Its inclusion in an array processor based on CNN allows for a more accurate implementation of the processing model and a more robust weight distribution scheme than those found in previous designs.Office of Naval Research (USA) N-00014- 02-1-0884Ministerio de Ciencia y Tecnología TIC2003-09817-C02-0