34 research outputs found

    Loss compensation in Metamaterials through embedding of active transistor based negative differential resistance circuits

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    This paper presents an all-electronic approach for loss compensation in metamaterials. This is achieved by embedding active-transistors based negative differential resistance (NDR) circuits in each unit cell of the metamaterial lattice. NDR circuits provide tunable loss compensation over a broad frequency range limited only by the maximum operating frequency of transistors that is reaching terahertz values in newer semiconductor processes. Design, simulation and experimental results of metamaterials composed of split ring resonators (SRR) with and without loss compensation circuits are presented

    Family Business Restructuring:A Review and Research Agenda

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    Although business restructuring occurs frequently and it is important for the prosperity of family firms across generations, research on family firms has largely evolved separately from research on business restructuring. This is a missed opportunity, since the two domains are complementary, and understanding the context, process, content, and outcome dimensions is relevant to both research streams. We address this by examining the intersection between research on business restructuring and family firms to improve our knowledge of each area and inform future research. To achieve this goal, we review and organize research across different dimensions to create an integrative framework. Building on current research, we focus on 88 studies at the intersection of family firm and business restructuring research to develop a model that identifies research needs and suggests directions for future research

    Simulation of phase noise generated by white noise in 1.7 GHz CMOS LC oscillator

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    A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS

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    As CMOS scales down and grows more expensive, area-aware RF front-end design becomes appropriate. A wideband front-end is presented that uses an inductorless LNA and downconversion section up to 6 GHz. Frequency synthesis is realized using a single-inductor dual-band 3.5 and 10 GHz VCO. In-depth analysis describes the operation of the 4-port oscillator, and compares phase noise to that of a classical VCO. The front-end is realized in 90 nm digital CMOS. The LNA achieves a noise figure of 2.7 dB with an average IIP3 of -2 dBm. The dual-band VCO achieves a phase noise of -122 dBc/Hz and -128 dBc/Hz at 3.9 GHz and 10 GHz, respectively, at 2.5 MHz offset. Both circuits are embedded in a wideband direct-conversion front-end consuming less than 60 mW from a 1.2 V supply

    1.1 GHz oscillator using bondwire inductance

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