792 research outputs found

    A comprehensive WebCT integration system

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    Murdoch University, in collaboration with industry partners, has developed a sophisticated middleware application (WebCTMan) between WebCT and other corporate systems, such as the Callista student records system, the Concept 1 human resources system and Murdoch’s own authentication system. This presentation will describe the architecture and functionality of this system. The impetus for WebCTMan was to enable Murdoch to change its student records database with minimal impact on our WebCT installation. However, WebCTMan now gives us great flexibility in managing our WebCT installation, enabling us to manage courses across teaching periods, and upgrade easily. This paper describes the context in which this system was built and gives an overview of its architecture. Courses in WebCTMan can have a status of active (where student details are updated nightly), inactive (where all students are orphans), and static (where student accounts are valid but not updated). Tools are available to change this status, and easily activate and deactivate courses. Different versions of courses are maintained for each teaching period, resolving the problem of overlap between semesters, when some students still have deferred examinations after the start of a new semester. In addition to managing students, WebCTMan provides functionality to manage staff and courses. Staff can request courses to be created or cloned from other courses. They can also create their own guest accounts and allocate tutors and markers to courses, and download class lists. Operators can create or rename courses on demand, as well as changing the roles of staff, including primary and secondary designers. A subset of functions is available to helpdesk operators, who can lookup details of both students and staff within the system

    Antimicrobial Susceptibilities of Aerobic Isolates from Respiratory Samples of Young New Zealand Horses

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    3rd Annual IEEE Energy Conversion Congress and Exposition, ECCE 2011, Phoenix, AZ, 17-22 September 2011This paper presents a method of mitigating the transient overshoots of DC-DC converters operating with large load disturbances. The method involves a small auxiliary power circuit with a complementary control scheme that provides a smooth absorption and release of excess energy from and to the main DC-DC converter in the events of large load changes. This control mechanism interactively mitigates the large transient overshoots which would otherwise appear at the converter output. Since the control scheme involves an adjustable-energy-storage feature, the proposed solution is effective for any level of step-load change within a pre-specified range.Department of Electronic and Information EngineeringRefereed conference pape

    Efficient and Practical Transfer Hydrogenation of Ketones Catalyzed by a Simple Bidentate Mn−NHC Complex

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    Catalytic reductions of carbonyl‐containing compounds are highly important for the safe, sustainable, and economical production of alcohols. Herein, we report on the efficient transfer hydrogenation of ketones catalyzed by a highly potent Mn(I)−NHC complex. Mn−NHC 1 is practical at metal concentrations as low as 75 ppm, thus approaching loadings more conventionally reserved for noble metal based systems. With these low Mn concentrations, catalyst deactivation is found to be highly temperature dependent and becomes especially prominent at increased reaction temperature. Ultimately, understanding of deactivation pathways could help close the activity/stability‐gap with Ru and Ir catalysts towards the practical implementation of sustainable earth‐abundant Mn‐complexes

    Identification of pathogenic Leptospira species and serovars in New Zealand using metabarcoding

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    Developmental Regulation of B Lymphocyte Immune Tolerance Compartmentalizes Clonal Selection from Receptor Selection

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    AbstractB lymphocyte development is a highly ordered process that involves immunoglobulin gene rearrangements, antigen receptor expression, and a learning process that minimizes the development of cells with reactivity to self tissue. Two distinct mechanisms for immune tolerance have been defined that operate during early bone marrow stages of B cell development: apoptosis, which eliminates clones of cells, and receptor editing, which spares the cells but genetically reprograms their autoreactive antigen receptors through nested immunoglobulin L chain gene rearrangements. We show here that sensitivity to antigen-induced apoptosis arises relatively late in B cell development and is preceded by a functionally distinct developmental stage capable of receptor editing. This regulation compartmentalizes clonal selection from receptor selection

    MATCHED ARCHITECTURES FOR SIGNAL PROCESSING AND CONTROL

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    Fast processing environments for real-time data acquisition, data processing and control applications may be realised using very different architectures. State of the art systems generally employ multiprocessors and parallel processing having a dedicated architecture such as systolic arrays to support computation-intensive signal processing tasks such as, for instance, convolution, filtering, FFT. etc. Mostly, general purpose rather than application driven architectures are used whenever possible and the available literature is heavily concentrated on the first configuration. At TPD-TNO, the research emphasis is on application driven architectures. and the objectives for the so-called 'matched' architecture designs are: - Capability for a wide range of sizes, starting from small systems. The objective here is design for scalability - Design for systems to be used in harsh environments - Design for minimum connectivity. reduced communication bandwidth, incorporation of dedicated preprocessing. multibus systems, etc. The real-time behaviour of general purpose architectures is not sufficiently predictable and they are not designed to perform acquisition tasks or data-intensive processing with high performance. Matched architectures, on the contrary, are designed for well defined applications and optimized for each application, The key effort in matched architecture research is directed towards efficiently mapping algorithms to processing steps in hardware (and software) architectures. Essentially. the design process is iterative
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