19 research outputs found

    A novel approach to low multiplicative complexity logic design

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    NEW IN THE PATELLA FRACTURES TREATMENT

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    In the literature there is a gap of publications about patella fractures management which is due to the absence of serious attention to the injuries of this largest sesamoid bone. In addition, in the world literature there is a lack of monographs and toolkits for the treatment of patients with these injuries, furthermore, in textbooks and traumatology manuals there are only a few template recommendations to the tactics of treating patients with this trauma. Meanwhile, patella fractures represent approximately 0.5-1.5% of all fractures, delayed union, formation of a false joint, and the emergence of patellofemoral arthrosis after these fractures is not uncommon. In the scientific literature on traumatology there is no unified, all-recognized classification of these fractures, which hinders the development of a single algorithm for the treatment of patients with patellar fractures. There are no contradictory views to the treatment of patella fractures without displacement; however, in relation to the treatment of patients with complex patella fractures, there are divergent views between the fracture fragments preservation to partial or even total patellectomy. In connection with the foregoing, We considered the issue of treating patients with patella fractures topical. Based on a thorough analysis of treatment results of 113 patients we provided a working classification based on the number of patellar fracture fragments (two-fragmentary, three-fragmentary, four-fragmentary, multi-fragmentary, upper and lower pole fractures). Based on this classification, traditional, modified and new methods of treating patients with patellar fractures were used. This is described in more detail in the forthcoming article

    Accumulation, Source Identification, and Cancer Risk Assessment of Polycyclic Aromatic Hydrocarbons (PAHs) in Different Jordanian Vegetables

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    The accumulation of polyaromatic hydrocarbons in plants is considered one of the most serious threats faced by mankind because of their persistence in the environment and their carcinogenic and teratogenic effect on human health. The concentrations of sixteen priority polycyclic aromatic hydrocarbons (16 PAHs) were determined in four types of edible vegetables (tomatoes, zucchini, eggplants, and cucumbers), irrigation water, and agriculture soil, where samples were collected from the Jordan Valley, Jordan. The mean total concentration of 16 PAHs (∑16PAHs) ranged from 10.649 to 21.774 µg kg−1 in vegetables, 28.72 µg kg−1 in soil, and 0.218 µg L−1 in the water samples. The tomato samples posed the highest ∑16PAH concentration level in the vegetables, whereas the zucchini samples had the lowest. Generally, the PAHs with a high molecular weight and four or more benzene rings prevailed among the studied samples. The diagnostic ratios and the principal component analysis (PCA) revealed that the PAH contamination sources in soil and vegetables mainly originated from a pyrogenic origin, traffic emission sources, and biomass combustion. The bioconcentration factors (BCF) for ∑16PAHs have been observed in the order of tomatoes > cucumbers and eggplants > zucchini. A potential cancer risk related to lifetime consumption was revealed based on calculating the incremental lifetime cancer risk of PAHs (ILCR). Therefore, sustainable agricultural practices and avoiding biomass combusting would greatly help in minimizing the potential health risk from dietary exposure to PAHs

    Compact and low power AES block cipher using lightweight key expansion mechanism and optimal number of S-Boxes

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    In the past decade, we observed the trend of technological advancement towards the field of portable electronics. As electronic devices shrink in size, constraints emerge in the form of limited power supply and area for the implementation of information security mechanisms. In this work, our goal is to produce a complete AES block cipher for data encryption and perform optimization in terms of power and size. Unlike the common approach of optimizing the circuitry of the expensive AES S-Box, this work contributes by proposing a compact key expansion mechanism to reduce hardware requirement and deducing the optimal number of S-Boxes to be used in an AES block cipher to achieve the desired performance. In addition, we optimized the design using a series of methodologies which include: (1) implementing the optimized AES S-Box proposed by Wong et al. [2], (2) reducing the number of pipeline registers, and (3) applying input bus sharing. As a result, we achieved three optimized configurations which employ different number of S-Boxes in their architectures. Our best architecture in terms of size and power consumption has a total logic element count of 1818, a total power dissipation of 122.40mW, and a throughput of 198.77Mbps. The design is implemented on a Cyclone II EP2C20F484C7 field-programmable gate array (FPGA)

    A throughput maximised parallel architecture for 2D fast discrete pascal transform

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    In this paper, we present a fully pipelined parallel implementation of a two dimensional (2D) Discrete Pascal Transform (DPT). Our approach first makes use of the properties of the Kronecker product and the vec operation on matrices to form an alternate 2D DPT representation suitable for column parallel computation. Next, we lend ourselves to the results from Skodras' work in 1D DPT to achieve the final architecture for fast 2D DPT. With a fully pipelined implementation, the architecture possesses an initial latency of 2 (N - 1) clock cycles and a maximum throughput of one complete two dimensional transform every clock cycle, given any input matrix of size N x N. To evaluate our work, our results obtained from actual FPGA implementation were benchmarked against results from other previous works

    Low multiplicative complexity logic minimisation over the basis (AND, XOR, NOT)

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    AES S-box using Fermat's Little Theorem for the highly constrained embedded devices

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    Construction of optimum composite field architecture for compact high-throughput AES S-boxes

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    In this work, we derive three novel composite field arithmetic (CFA) Advanced Encryption Standard (AES) S-boxes of the field GF(((2 2) 2) 2). The best construction is selected after a sequence of algorithmic and architectural optimization processes. Furthermore, for each composite field constructions, there exists eight possible isomorphic mappings. Therefore, after the exploitation of a new common subexpression elimination algorithm, the isomorphic mapping that results in the minimal implementation area cost is chosen. High throughput hardware implementations of our proposed CFA AES S-boxes are reported towards the end of this paper. Through the exploitation of both algebraic normal form and seven stages fine-grained pipelining, our best case achieves a throughput 3.49 Gbps on a Cyclone II EP2C5T144C6 field-programmable gate array

    Composite field GF(((2^2)^2)^2) AES S-Box with direct computation in GF(2^4) inversion

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    Composite field arithmetic (CFA) has been widely used in designing combinatorial logic circuits for the S-Box function in the Advanced Encryption Standard (AES) in order to mitigate the performance bottleneck in VLSI implementation. In this work, we first categorize all of the possible composite field AES S-box constructions into four main architectures based on their field representations and the chosen algebraic properties. Each category is then investigated thoroughly. Next, we show that by computing the F(24) inversion directly in the composite field F(((22)2) 2), we can further reduce the total area gate count as well as the critical path gate count. The architecture that leads to the maximum reduction in both total area coverage and critical path gate count through the exploitation of direct computation in F(24) inversion is found and reported. Our best architecture has a total area gate count of 35 AND gates and 117 XOR gates and critical path gate count of 3 AND gates and 20 XOR gates

    Compact and short critical path finite field inverter for cryptographic S-box

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