Degradation modeling and degradation-aware control of power electronic systems

The power electronics market is valued at $23.25 billion in 2019 and is projected to reach$ 36.64 billion by 2027. Power electronic systems (PES) have been extensively used in a wide range of critical applications, including automotive, renewable energy, industrial variable-frequency drive, etc. Thus, the PESs\u27 reliability and robustness are immensely important for the smooth operation of mission-critical applications. Power semiconductor switches are one of the most vulnerable components in the PES. The vulnerability of these switches impacts the reliability and robustness of the PES. Thus, switch-health monitoring and prognosis are critical for avoiding unexpected shutdowns and preventing catastrophic failures. The importance of the prognosis study increases dramatically with the growing popularity of the next-generation power semiconductor switches, wide bandgap switches. These switches show immense promise in the high-power high-frequency operations due to their higher breakdown voltage and lower switch loss. But their wide adaptation is limited by the inadequate reliability study. A thorough prognosis study comprising switch degradation modeling, remaining useful life (RUL) estimation, and degradation-aware controller development, is important to enhance the PESs\u27 robustness, especially with wide bandgap switches. In this dissertation, three studies are conducted to achieve these objectives- 1) Insulated Gate Bipolar Transistor (IGBT) degradation modeling and RUL estimation, 2) cascode Gallium Nitride (GaN) Field-Effect Transistor (FET) degradation modeling and RUL estimation, and 3) Degradation-aware controller design for a PES, solid-state transformer (SST). The first two studies have addressed the significant variation in RUL estimation and proposed degradation identification methods for IGBT and cascode GaN FET. In the third study, a system-level integration of the switch degradation model is implemented in the SST. The insight into the switch\u27s degradation pattern from the first two studies is integrated into developing a degradation-aware controller for the SST. State-of-the-art controllers do not consider the switch degradation that results in premature system failure. The proposed low-complexity degradation-aware and adaptive SST controller ensures optimal degradation-aware power transfer and robust operation over the lifetime

A Fast Loss Model for Cascode GaN-FETs and Real-Time Degradation-Sensitive Control of Solid-State Transformers

This paper proposes a novel, degradation-sensitive, adaptive SST controller for cascode GaN-FETs. Unlike in traditional transformers, a semiconductor switch’s degradation and failure can compromise its robustness and integrity. It is vital to continuously monitor a switch’s health condition to adapt it to mission-critical applications. The current state-of-the-art degradation monitoring methods for power electronics systems are computationally intensive, have limited capacity to accurately identify the severity of degradation, and can be challenging to implement in real time. These methods primarily focus on conducting accelerated life testing (ALT) of individual switches and are not typically implemented for online monitoring. The proposed controller uses accelerated life testing (ALT)-based switch degradation mapping for degradation severity assessment. This controller intelligently derates the SST to (1) ensure robust operation over the SST’s lifetime and (2) achieve the optimal degradation-sensitive function. Additionally, a fast behavioral switch loss model for cascode GaN-FETs is used. This proposed fast model estimates the loss accurately without proprietary switch parasitic information. Finally, the proposed method is experimentally validated using a 5 kW cascode GaN-FET-based SST platform