A 22-pJ/spike 73-Mspikes/s 130k-compartment neural array transceiver with conductance-based synaptic and membrane dynamics

Neuromorphic cognitive computing offers a bio-inspired means to approach the natural intelligence of biological neural systems in silicon integrated circuits. Typically, such circuits either reproduce biophysical neuronal dynamics in great detail as tools for computational neuroscience, or abstract away the biology by simplifying the functional forms of neural computation in large-scale systems for machine intelligence with high integration density and energy efficiency. Here we report a hybrid which offers biophysical realism in the emulation of multi-compartmental neuronal network dynamics at very large scale with high implementation efficiency, and yet with high flexibility in configuring the functional form and the network topology. The integrate-and-fire array transceiver (IFAT) chip emulates the continuous-time analog membrane dynamics of 65 k two-compartment neurons with conductance-based synapses. Fired action potentials are registered as address-event encoded output spikes, while the four types of synapses coupling to each neuron are activated by address-event decoded input spikes for fully reconfigurable synaptic connectivity, facilitating virtual wiring as implemented by routing address-event spikes externally through synaptic routing table. Peak conductance strength of synapse activation specified by the address-event input spans three decades of dynamic range, digitally controlled by pulse width and amplitude modulation (PWAM) of the drive voltage activating the log-domain linear synapse circuit. Two nested levels of micro-pipelining in the IFAT architecture improve both throughput and efficiency of synaptic input. This two-tier micro-pipelining results in a measured sustained peak throughput of 73 Mspikes/s and overall chip-level energy efficiency of 22 pJ/spike. Non-uniformity in digitally encoded synapse strength due to analog mismatch is mitigated through single-point digital offset calibration. Combined with the flexibly layered and recurrent synaptic connectivity provided by hierarchical address-event routing of registered spike events through external memory, the IFAT lends itself to efficient large-scale emulation of general biophysical spiking neural networks, as well as rate-based mapping of rectified linear unit (ReLU) neural activations

A 144MHz integrated resonant regulating rectifier with hybrid pulse modulation

This paper presents a CMOS fully-integrated resonant regulating rectifier (IR3) for inductive power telemetry in implantable devices. Employing PWM and PFM feedback, the IR3 achieves 1.87% of delta VDD/VDD ratio despite a tenfold change in load with a 1nF decoupling capacitor. At 1V regulation of a 100μW load from a 144MHz RF input, the measured voltage conversion efficiency is greater than 92% at under 5.2mVpp ripple and 54% power conversion efficiency. Implemented in 180nm SOI CMOS, the IR3 circuit occupies 0.078mm2 active area

A 16-channel wireless neural interfacing SoC with RF-powered energy-replenishing adiabatic stimulation

This paper presents a fully-integrated 16-channel wireless neural interfacing SoC that employs an adiabatic stimulator powered directly from a 190-MHz on-chip antenna to eliminate bulky external components while simultaneously avoiding rectifier and regulator losses. Using a charge replenishing architecture, the stimulator outputs up to 145-μA, while achieving a 63.1% charge replenishing ratio and a stimulation efficiency factor of 6.0. Analog front-ends (AFEs) and telemetry circuitry are also included

Silicon Integrated High-density Electrocortical and Retinal Neural Interfaces

Recent interest and initiatives in brain research have driven a worldwide effort towards developing implantable neural interface systems with high spatiotemporal resolution and spatial coverage extending to the whole brain. Electrocorticography (ECoG) promises a minimally invasive, chronically implantable neural interface with resolution and spatial coverage capabilities that, when appropriately scaled, meet the needs of recently proposed brain initiatives. Current ECoG technologies, however, typically rely on cm-sized electrodes and wired operation, severely limiting their resolution and long-term use.The work presented here has advanced micro-electrocorticography (uECoG) technologies for wireless high-density cortical neural interfaces in two main directions: flexible active uECoG arrays; and modular fully integrated uECoG systems. This dissertation presents a systematic design methodology which addresses unique design challenges posed by the extreme densities, form factors and power budgets of these fully implantable neural interface systems, with experimental validation of their performance for neural signal acquisition, stimulation, and wireless powering and data communication. Notable innovations include 1) first demonstration of simultaneous wireless power and data telemetry at 6.78 Mbps data rate over a single 13.56 MHz inductive link; 2) integrated recording from a flexible active electrode ECoG array with 85 dB dynamic range at 7.7 nJ energy per 16-b sample; and 3) the first fully integrated and encapsulated wireless neural-interface-on-chip microsystem for non-contact neural sensing and energy-replenishing adiabatic stimulation delivering 145 uA current at 6 V compliance within 2.25 mm3 volume.In addition, the work presented here on advancing the resolution and coverage of neural interfaces extends further from the cortex to the retina. Despite considerable advances in retinal prostheses over the last two decades, the resolution of restored vision has remained severely limited, well below the 20/200 acuity threshold of blindness. Towards drastic improvements in spatial resolution, this dissertation presents a scalable architecture for retinal prostheses in which each stimulation electrode is directly activated by incident light and powered by a common voltage pulse transferred over a single wireless inductive link. The hybrid optical addressability and electronic powering scheme provides for separate spatial and temporal control over stimulation, and further provides optoelectronic gain for substantially lower light intensity thresholds than other optically addressed retinal prostheses using passive microphotodiode arrays. The architecture permits the use of high-density electrode arrays with ultra-high photosensitive silicon nanowires, obviating the need for excessive wiring and high-throughput data telemetry. Instead, the single inductive link drives the entire array of electrodes through two wires andprovides external control over waveform parameters for the common voltage stimulation. A complete system comprising inductive telemetry link, stimulation pulsedemodulator, charge-balancing series capacitor, and nanowire-based electrode device is integrated and validated ex vivo on rat retina tissue. Measurements demonstrate control over retinal neural activity both by light and electrical bias, validating the feasibility of the proposed architecture and its system components as an important first step towards a high-resolution optically addressed retinal prosthesis

Silicon Integrated High-density Electrocortical and Retinal Neural Interfaces

Recent interest and initiatives in brain research have driven a worldwide effort towards developing implantable neural interface systems with high spatiotemporal resolution and spatial coverage extending to the whole brain. Electrocorticography (ECoG) promises a minimally invasive, chronically implantable neural interface with resolution and spatial coverage capabilities that, when appropriately scaled, meet the needs of recently proposed brain initiatives. Current ECoG technologies, however, typically rely on cm-sized electrodes and wired operation, severely limiting their resolution and long-term use.The work presented here has advanced micro-electrocorticography (uECoG) technologies for wireless high-density cortical neural interfaces in two main directions: flexible active uECoG arrays; and modular fully integrated uECoG systems. This dissertation presents a systematic design methodology which addresses unique design challenges posed by the extreme densities, form factors and power budgets of these fully implantable neural interface systems, with experimental validation of their performance for neural signal acquisition, stimulation, and wireless powering and data communication. Notable innovations include 1) first demonstration of simultaneous wireless power and data telemetry at 6.78 Mbps data rate over a single 13.56 MHz inductive link; 2) integrated recording from a flexible active electrode ECoG array with 85 dB dynamic range at 7.7 nJ energy per 16-b sample; and 3) the first fully integrated and encapsulated wireless neural-interface-on-chip microsystem for non-contact neural sensing and energy-replenishing adiabatic stimulation delivering 145 uA current at 6 V compliance within 2.25 mm3 volume.In addition, the work presented here on advancing the resolution and coverage of neural interfaces extends further from the cortex to the retina. Despite considerable advances in retinal prostheses over the last two decades, the resolution of restored vision has remained severely limited, well below the 20/200 acuity threshold of blindness. Towards drastic improvements in spatial resolution, this dissertation presents a scalable architecture for retinal prostheses in which each stimulation electrode is directly activated by incident light and powered by a common voltage pulse transferred over a single wireless inductive link. The hybrid optical addressability and electronic powering scheme provides for separate spatial and temporal control over stimulation, and further provides optoelectronic gain for substantially lower light intensity thresholds than other optically addressed retinal prostheses using passive microphotodiode arrays. The architecture permits the use of high-density electrode arrays with ultra-high photosensitive silicon nanowires, obviating the need for excessive wiring and high-throughput data telemetry. Instead, the single inductive link drives the entire array of electrodes through two wires andprovides external control over waveform parameters for the common voltage stimulation. A complete system comprising inductive telemetry link, stimulation pulsedemodulator, charge-balancing series capacitor, and nanowire-based electrode device is integrated and validated ex vivo on rat retina tissue. Measurements demonstrate control over retinal neural activity both by light and electrical bias, validating the feasibility of the proposed architecture and its system components as an important first step towards a high-resolution optically addressed retinal prosthesis

A Non-Contact Compact Portable ECG Monitoring System

Cardiovascular diseases (CVDs) have been listed among the most deadly diseases worldwide. Many CVDs are likely to manifest their symptoms some time prior to the onset of any adverse or catastrophic events, and early detection of cardiac abnormalities is incredibly important. However, traditional electrocardiography (ECG) monitoring systems face challenges with respect to their scalability and affordability as they require direct body contact and cumbersome equipment. As a step forward from the large-scale direct-contact ECG monitoring devices, which are inconvenient for the user in terms of wearability and portability, in this research, we present a small-sized, non-contact, real-time recording system for mobile long-term monitoring of ECG signals. The device mainly comprises three non-contact electrodes to sense the bio-potential signal, an AD8233 AFE IC to extract the ECG signal, and a CC2650 MCU to read, filter, and transmit them. The device is powered by a 2000 mAh lithium-ion battery with isolation between digital and analog powers on the board using two low-dropout regulators (LDOs). The board’s dimension is 8.56 cm × 5.4 cm, the size of a credit card, making it optimal to be worn in a shirt chest pocket. In spite of its small form factor, the device still manages to achieve a continuous measurement battery life of over 16 h, total harmonic distortion below −30 dB across the interested frequency range, an input-referred noise as low as 1.46 µV for contacted cases and 5.15 µV for non-contact cases through cotton, and clear ECG recording for both contact and non-contact sensing, all at a cost around USD 50

An Auto-Reconfigurable Multi-Output Regulating Switched-Capacitor DC–DC Converter for Wireless Power Reception and Distribution in Multi-Unit Implantable Devices

An automatically reconfigurable switched-capacitor DC-DC converter with multiple regulated outputs is presented for wireless-powered multi-unit implantable medical devices (IMDs). In such devices, the main controller unit is powered wirelessly and provides supply voltages to the circuits of the main unit as well as multiple connected sub-units. The proposed DC-DC converter simultaneously generates two regulated voltages for the main unit and two unregulated voltages for the sub-units, which have on-site low-dropout regulators. The converter consists of i) an input-adaptive DC-DC conversion stage with two switched-capacitor (SC) DC-DC converters in series and ii) a regulating stage. In the DC-DC conversion stage, the proposed converter automatically reconfigures the conversion ratio and connection order of the two SC DC-DC converters and selects the output nodes by load selection switches depending on the input level. Thanks to these adaptive configurations, the proposed converter offers high conversion efficiencies over a wide input voltage range even with fewer flying capacitors required for the reconfigurable conversion ratios. Moreover, the selection switches are reused to regulate the output voltages to desired levels, minimizing the overhead for subsequent regulation. The IC fabricated in a 180-nm standard CMOS process achieves a conversion efficiency of 95.5% for the unregulated voltages and up to 77.4% for the regulated voltages over a wide input range of 1 V to 4 V with 0.74-mV output ripple for a load current of 20 mA, while providing four outputs (2 regulated, 2 unregulated)

A 22-pJ/spike 73-Mspikes/s 130k-compartment neural array transceiver with conductance-based synaptic and membrane dynamics

Neuromorphic cognitive computing offers a bio-inspired means to approach the natural intelligence of biological neural systems in silicon integrated circuits. Typically, such circuits either reproduce biophysical neuronal dynamics in great detail as tools for computational neuroscience, or abstract away the biology by simplifying the functional forms of neural computation in large-scale systems for machine intelligence with high integration density and energy efficiency. Here we report a hybrid which offers biophysical realism in the emulation of multi-compartmental neuronal network dynamics at very large scale with high implementation efficiency, and yet with high flexibility in configuring the functional form and the network topology. The integrate-and-fire array transceiver (IFAT) chip emulates the continuous-time analog membrane dynamics of 65 k two-compartment neurons with conductance-based synapses. Fired action potentials are registered as address-event encoded output spikes, while the four types of synapses coupling to each neuron are activated by address-event decoded input spikes for fully reconfigurable synaptic connectivity, facilitating virtual wiring as implemented by routing address-event spikes externally through synaptic routing table. Peak conductance strength of synapse activation specified by the address-event input spans three decades of dynamic range, digitally controlled by pulse width and amplitude modulation (PWAM) of the drive voltage activating the log-domain linear synapse circuit. Two nested levels of micro-pipelining in the IFAT architecture improve both throughput and efficiency of synaptic input. This two-tier micro-pipelining results in a measured sustained peak throughput of 73 Mspikes/s and overall chip-level energy efficiency of 22 pJ/spike. Non-uniformity in digitally encoded synapse strength due to analog mismatch is mitigated through single-point digital offset calibration. Combined with the flexibly layered and recurrent synaptic connectivity provided by hierarchical address-event routing of registered spike events through external memory, the IFAT lends itself to efficient large-scale emulation of general biophysical spiking neural networks, as well as rate-based mapping of rectified linear unit (ReLU) neural activations