Systematic Optimization of Multiple Voltage Domain DC Distribution Architectures

Complex electronic systems often require a power distribution architecture that provides multiple, separate voltage domains for various subsystem loads such as microprocessor cores, interface, memory, analog, and radio frequency components. The multiple point-of-load regulated voltages are typically generated using multiple dc-dc converters operating from a single input dc voltage. This thesis examines the systematic optimization of multiple voltage domain dc distribution architectures using commercially available or custom single-input single-output dc-dc converter building blocks. Three techniques are presented for this purpose: The first, an exhaustive search process called the Permutation Graph Method, enumerates possible converter arrangements and selects the converter blocks to achieve the best system figure of merit in terms of system efficiency, size, cost, power density, or a combination of these metrics. This technique is effective for systems with fewer than single digit outputs, but in larger systems becomes intractable. To solve these large problems two techniques are presented which move through the design space efficiently and find the optimal solution without exhaustive enumeration. The first is inspired by descent-based optimization and the second is based on a probabilistic optimization technique called simulated annealing. This thesis details their operation and implementation, analyzes their performance from a theoretical viewpoint, and through representative cases studies validates their performance compared to the state-of-the-art. The thesis concludes with a discussion on the use of machine learning techniques for the design and optimization of power electronics systems