Validation formelle d'un mécanisme de synchronisation pour réseaux sans fil

International audienceLe développement des réseaux et notamment les réseaux de capteurs incite les industries à considérer pour leurs systèmes de communication des alternatives amenant une réduction des coûts et de la complexité tout en garantissant la fiabilité. Ce papier décrit la validation formelle par réseaux de Petri temporels et model checking d'un nouveau protocole de synchronisation avec qualité de service pour réseau maillé de capteurs sans fil utilisant le standard de communication IEEE 802.15.4/ZigBee. L'utilisation des méthodes formelles dans le cadre des réseaux sans fil est assez récente et les résultats obtenus dans cet article prouvent que ces méthodes sont intéressantes dans ce contexte

Temporal bounds verification of the STIMAP protocol

International audienceThis article deals with the temporal validation of STIMAP, a medium access protocol. This protocol has been designed to meet the specific requirements of an implantable network-based neuroprosthese. This article presents the modeling of STIMAP with Time Petri Nets (TPN), and the verification of the deterministic medium access it provides, using timed model checking. The specific case of the synchronization reference time mechanism is detailed, explaining the problem it poses for the verification process and the solution we use to provide the whole protocol validation. This interesting and complex case study shows that existing formal methods and tools are not perfectly suitable for the validation of real systems, especially when some dynamic duration or hard- ware parameters have to be considered

Formal Validation of a Deterministic MAC Protocol

International audienceThis article deals with the formal validation of a medium access protocol. This protocol has been designed to meet the specific requirements of an implantable network-based neuroprosthese. This article presents the modeling of STIMAP with Time Petri Nets (TPN), and the verification of the deterministic medium access it provides, using timed model checking. Doing so, we show that existent formal methods and tools are not perfectly suitable for the validation of real system, espe- cially when some hardware parameters has to be considered. This article then presents how these difficulties have been managed and gives the validation results for STIMAP, providing constraints on the protocol parameters that must be respected to guaranty its determinism

Abstractions de modèles en automates temporisés pour la validation temporelle d'architectures embarquées

National audienceThe reliability of critical real time distributed applications must be guaranty by formal techniques of validation, as the model-checking. However these techniques often lead to combinatory explosion problems. This paper proposes efficient abstractions of the timed automata model of TTA (Time-Triggered Architecture) in a temporal validation context.La fiabilité des applications distribuées temps réel critiques doit être garantie par des techniques formelles de validation, comme le model-checking. Cependant, ces méthodes ont souvent des problèmes dexplosion combinatoire. Cet article propose des abstractions efficaces pour la modélisation et la validation temporelle de l'architecture TTA (Time-Triggered Architecture) avec des automates temporisés (UPPAAL)

Handling Exceptions in Petri Net-Based Digital Architecture: From Formalism to Implementation on FPGAs

International audienceA component-based approach to the specification and implementation of complex digital systems on field-programmable gate arrays (FPGAs) has been developed, with the behavior and composition of the components specified by Petri nets (PNs). Yet modeling behavior in the case of error becomes intricate if only PNs are used. In this case, the designer often has to address every possible situation when an error occurs, which leads to complex models and human errors. This paper offers a way to model exception handling by adding the concept of macroplace (MP) to the formalism while preserving the conformity and efficiency of the implementation on a programmable logic device (such as FPGAs), as well as the analyzability of the model

Interpreted Synchronous Extension of Time Petri Nets - Definition, Semantics and Formal Analysis

International audienceOur work is integrated into a global methodology to design synchronously executed embedded critical systems. It is used for the development of medical devices implanted into human body to perform functional electrical stimulation solutions (used in pacemakers, deep brain stimulation...). These systems are of course critical and real time, and the reliability of their behaviors must be guaranteed. These medical devices are implemented into a programmable logic circuit in a synchronous way, which allows efficient implementation (space, consumption and actual parallelism of tasks execution). This paper presents a solution that helps to prove that the behavior of the implemented system respects a set of properties, using Petri nets for modeling and analysis purposes. But one problem in formal methods is that the hardware target and the implementation strategy can have an influence on the execution of the system, but is usually not considered in the modeling and verification processes. Resolving this issue is the goal of this article. Our work has two main results: an operational one, and a theoretical one. First, we can now design critical controllers with hard safety or real time constraints, being sure the behavior is still guaranteed during the execution. Second, this work broadens the scope of expressivity and analyzability of Petri nets extensions. Until then, none managed in the same formalism, both for modeling and analysis, all the characteristics we have considered (weights on arcs, specific test and inhibitor arcs, interpretation, and time intervals, including the management of effective conflicts and the blocking of transitions)

Sliding Time Interval based MAC Protocol and its Temporal Validation

International audienceIn the context of distributed systems, the communication requirements are very different depending on the supported application, the system topology and the environment. The functional electrical stimulation is a critical and real time application domain: communications have to be safe (no loss, neither long nor unexpected delay). Therefore, an important part of this system from an efficiency point of view is the medium access mechanism. To fit with the specific constraints of our context, a new MAC protocol has been designed: STIMAP (Sliding Time Interval based Medium Access Protocol). This article presents a formal validation of this new protocol, allowing the validation of its behavior in an exhaustive way

Integrating Implementation Properties in Analysis of Petri Nets Handling Exceptions

International audienceTo design and implement complex digital systems, designers need to have an efficient methodology. In this goal, HILECOP has been developed to transform automatically Petri nets in a VHDL code. To ease design and increase the reactivity of exception handling, the mechanism of macroplace has been added to the formalism of Petri nets. This article describes an automatic model transformation for the analysis step. It integrates implementation properties to enhance reliability

Analyse de Réseau de Petri Temporels Exécutés de Façon Synchrone

National audienceLors de la conception de systèmes numériques complexes, le recours aux méthodes formelles est utile notamment pour valider les propriétés du système, avec certitude. Cependant, les processus de validation usuels font abstraction des propriétés non fonc-tionnelles, notamment celles issues des contraintes d'exécution sur la cible matérielle. En l'occurrence, l'analyse des réseaux de Petri temporels doitêtrédoitêtré etudiée avec attention lorsque ce formalisme, intrinsèquement asynchrone, est exécuté de façon synchrone sur un FPGA. Il faut alors considérer la synchronisation d'horloge, le parallélisme effectif et l'interprétation. Actuellement, aucune sémantique formelle et aucune méthode d'analyse ne s'attaquentàattaquent`attaquentà toutes ces problématiques en même temps. Ainsi, nous proposons une nouvelle méthode d'analyse pour les réseaux de Petri interprétés exécutés en synchrone, avec une sémantique formelle d'exécution et un graphe d'´ etats spécifique : le Graphe de Comportement Synchrone