Hardware Implementation of FTC of Induction Machine on FPGA

In this paper, a new design method of Direct Torque Control using Space Vector Modulation (DTC-SVM) of an Induction Machine (IM), which is based on Fault Tolerant Control (FTC) is proposed. Due to its complexity, the FTC implemented on a microcontroller and a Digital Signal Processor (DSP) is characterized by a calculating delay. To solve this problem, an alternative digital solution is used, based on the Field Programmable Gate Array (FPGA), which is characterized by a fast processing speed. However, as an FPGAs increase in size, there is a need for improved productivity, and this includes new design flows and tools. Xilinx System Generator (XSG) is a high-level block-based design tool that offers bit and cycle accurate simulation. This tool can automatically generate the Very High-Density Logic (VHDL) code without resorting to a tough programming, without being obliged to do approximations and more we can visualize the behavior of the machine before implementation which is very important for not damage our machine. Simulation and experimental results using Hardware In the Loop (HIL) of the FTC based DTC-SVM is compared with those of the conventional DTC. The comparison results illustrate the reduction in the torque and stator flux ripples. Our purpose is to reveal our algorithm efficiency and to show the Xilinx Virtex V FPGA performances in terms of execution time.

Hardware software co-simulation of a digital EMI filter using Xilinx system generator

Mitigation of electromagnetic inference (EMI) is currently a challenge for scientists and designers in order to cope with electromagnetic compatibility (EMC) compliance in switching mode power supply (SMPS) and ensure the reliability of the whole system. Standard filtering techniques: passive and active ones present some insufficiency in terms of performance at high frequencies (HF) because analog components would no longer be controllable and this is mainly due to their parasitic elements. So developing EMI digital filters is very interesting, especially with the embedment of a machine control system on a field programmable gate array (FPGA) chip. In this paper, we present a design of an active digital EMI filter (ADF) to be integrated in a drive train system of an electric vehicle (EV). Hardware design as well as FPGA implementation issues have been presented to prove the efficiency of the developed digital filtering structure