Circumstellar dust shells of hot post-AGB stars

Using a radiative transfer code (DUSTY) parameters of the circumstellar dust shells of 15 hot post-AGB stars have been derived. Combining the optical, near and far-infrared (ISO, IRAS) data of the stars, we have reconstructed their spectral energy distributions (SEDs) and estimated the dust temperatures, mass loss rates, angular radii of the inner boundary of the dust envelopes and the distances to these stars. The mass loss rates (10$^{-6}-10^{-5}$M$_{\odot}$yr$^{-1}$) are intermediate between stars at the tip of the AGB and the PN phase. We have also studied the ISO spectra of 7 of these stars. Amorphous and crystalline silicate features were observed in IRAS14331-6435 (Hen3-1013), IRAS18062+2410 (SAO85766) and IRAS22023+5249 (LSIII +5224) indicating oxygen-rich circumstellar dust shells. The presence of unidentified infrared (UIR) band at 7.7$\mu$, SiC emission at 11.5$\mu$ and the "26$\mu$" and "main 30$\mu$" features in the ISO spectrum of IRAS17311-4924 (Hen3-1428) suggest that the central star may be carbon-rich. The ISO spectrum of IRAS17423-1755 (Hen3-1475) shows a broad absorption feature at 3.1$\mu$ due to C$_{2}$H$_{2}$ and/or HCN which is usually detected in the circumstellar shells of carbon-rich stars.Comment: 18 pages, accepted for publication in A&

A Reconfigurable Pattern Matching Hardware Implementation Using On-Chip RAM-Based FSM

The use of synthesizable reconfigurable IP cores has increasingly become a trend in System on Chip (SoC) designs because of their flexibility and powerful functionality. The market introduction of multi-featured platform FPGAs equipped with embedded memory and processor blocks has further expanded the possibility of utilizing dynamic reconfiguration to improve overall system adaptability to meet varying product requirements. In this paper, a reconfigurable hardware implementation for pattern matching using Finite State machine (FSM) is proposed. The FSM design is RAMbased and is reconfigured on the fly through altering memory contents only. An embedded processor is used for orchestrating run time reconfiguration. Experimental results show that the system can reconfigure itself based on a new incoming pattern and perform the text search without the need of a host processor. Results also proved that each search iteration was executed in one clock cycle and the maximum achievable clock frequency is independent of search pattern length

India that is Bharat : the politics of a national name

A recent writ petition on renaming India as Bharat, which got dismissed by the Supreme Court, is discussed. There are political motives behind naming or renaming a place, but Hindustan, Bharat, and Hind—are all part of the package that is India

A Reconfigurable Pattern Matching Hardware Implementation Using On-Chip Ram-Based FSM

The use of synthesizable reconfigurable IP cores has increasingly become a trend in System on Chip (SOC) designs. Such domain-special cores are being used for their flexibility and powerful functionality. The market introduction of multi-featured platform FPGAs equipped with on-chip memory and embedded processor blocks has further extended the possibility of utilizing dynamic reconfiguration to improve overall system adaptability to meet varying product requirements. A dynamically reconfigurable Finite State Machine (FSM) can be implemented using on-chip memory and an embedded processor. Since FSMs are the vital part of sequential hardware designs, the reconfiguration can be achieved in all designs containing FSMs. In this thesis, a FSM-based reconfigurable hardware implementation is presented. The embedded soft-core processor is used for orchestrating the run-time reconfiguration. The FSM is implemented using an on-chip memory. The hardware can be reconfigured on-the-fly by only altering the memory content. The use of a processor for reconfiguration enables SOC designers to utilize both software and hardware capability to achieve reconfiguration. This scheme of reconfigurable hardware implementation is independent of the placement and routing of the hardware on the FPGA. To demonstrate the feasibility of the proposed approach, the Knuth-Morris-Pratt (KMP) algorithm was implemented. A unique way of using memory-based FSM to reconfigure and speed up the KMP search algorithm has been introduced. With the proposed technique, the system can reconfigure itself based on a new incoming pattern and perform a pattern search on a given text without involving a host processor. Data extracted from test cases shows that the proposed approach made the maximum achievable frequency of the design independent of the pattern length. The number of clock cycles required to match the pattern in the worst case is equal to the pattern length plus the text length (O (m+n))

Book Review : India’s Founding Moment: The Constitution of a Most Surprising Democracy, by Madhav Khosla, (Cambridge, Massachusetts and London, England: Harvard University Press, 2020), xiv + 240 pp., hardback, £36.95, ISBN: 9780674980877

Seventy years after its adoption, the Indian Constitution appears increasingly irrelevant in adjudication and governance, even as the country plunges deeper into democratic crisis. Attempts to remind the state of the basis of its existence—for instance, through mass recitations of the preamble during protests against amendments to the citizenship law—appear to fall on deaf ears. Viewed in this context, a return to the promises of the founding moment may offer respite, if not rescue, from the cynicism of the present. After decades of historical neglect, recent scholarship on Indian constitutional history approximates this return to origins through diverse perspectives: the search for lost histories, asin Arvind Elangovan’s study of the constitutional advisor B.N. Rau (A. Elangovan, Norms and Politics: Sir Benegal Narsing Rau in the Making of the Indian Constitution, 1935–50, (Oxford: Oxford University Press, 2019)) and Aakash Singh Rathore’s search for the author of the preamble (A. Singh Rathore, Ambedkar’s Preamble: A Secret History of the Constitution of India (New Delhi: Penguin Random House, 2020)), revisionist accounts of political events, such as Tripurdaman Singh’s, Sixteen Stormy Days: The Story of the First Amendment of the Constitution of India (New Delhi: Penguin Random House, 2020), and the recovery of subaltern agency, for instance in Rohit De’s A People’s Constitution: The Everyday Life of Law in the Indian Republic (Princeton, New Jersey: Princeton University Press, 2018). In India’s Founding Moment, Madhav Khosla asks: how did the founders of modern India institute democratic self-government in the absence of its preconditions

Hardware Implementation of Real-Time Operating System’s Thread Context Switch

Increasingly, embedded real-time applications use multi-threading. The benefits of multi-threading include greater throughput, improved responsiveness, and ease of development and maintenance. However, there are costs and pitfalls associated with multi-threading. In some of hard real-time applications, with very precise timing requirements, multi-threading itself becomes an overhead cost mainly due to scheduling and contextswitching components of the real-time operating system (RTOS). Different scheduling algorithms have been suggested to improve the overall system performance. However, context-switching still consumes much of the processor’s time and becomes a major overhead cost especially for hard real-time embedded systems. A typical RTOS context switch consumes 50 to 80 processor clock cycles (depending on processor architecture and context size) to store and restore the thread context. If a real-time application needs to respond to an event repeatedly less than this time, then the overall system performance may not be acceptable. The suggested approach in this thesis improves the context-switching time drastically. This technique has been implemented in hardware, as part of the processor state along with new central processing unit (CPU) instructions to take care of the context-switching process without interacting with external memory. With the suggested approach, the thread contextswitch can be achieved in 4 CPU clock cycles independent of context size. This is a significant improvement to thread context switching

Voter, citizen, Enemy

The ruling party’s attempts to redefi ne citizenship seem intent on bringing popular notions of Indianness in line with its cultural sympathies, in time for the general elections in 2019. In a post-truth age of alternate facts, it may be trite to point out that the state can change entire narratives by controlling defi nitions. This article examines the Citizenship Bill, 2016 and the Enemy Property (Amendment and Validation) Act, 2017 to fi nd out if the erasure of the Muslim as “voter” dovetails with a radical refashioning of an “enemy” who is also a “citizen.

Impact of Tetracycline on Basil and its Remediation Potential

404-413Over the past decade presence of antibiotics in soil and water is a major environmental concern which needs to be address on a priority basis. The present study was done to evaluate the potential of basil (Ocimum basilicum) for phytoremediation. A greenhouse study was conducted for removal of tetracycline from soil. The plants were grown with 200 mgkg−1, 400 mgkg−1, and 600 mgkg−1 of tetracycline for four weeks. Accumulation of tetracycline in shoot and root was observed with HPTLC in plants. They showed a maximum of 97% remediation capability with 200 mgkg−1of tetracycline treated plants. Secondary metabolites were lepoxygenase pathway products in stress condition. The same were analyzed by GCMS. Alpha-terpineol and methyl acetate completely degraded in all samples, while they were present in plants grown without tetracycline. This could be because antibiotic treatments impact the production of lipoxygenase pathway products, while in some cases secondary metabolites increase marginally as the tetracycline concentrations increased. The aim of the current work was the use of plant-based system for phytoremediation and toxicological impact of tetracycline on basil

Impact of tetracycline on basil and its remediation potential

Over the past decade presence of antibiotics in soil and water is a major environmental concern which needs to be address on a priority basis. The present study was done to evaluate the potential of basil (Ocimum basilicum) for phytoremediation. A greenhouse study was conducted for removal of tetracycline from soil. The plants were grown with 200 mg kg-1, 400 mg kg-1 and 600 mg kg-1 of tetracycline for four weeks (4W). The accumulation of tetracycline in shoot and root was observed with HPTLC in which the plant showed 97 % remediation capability with 200 mg kg-1 of tetracycline treated plants. Secondary metabolites are lepoxygenase pathway products in stress condition which was analyzed by GC-MS. Alpha-terpineol and methyl acetate completely degraded in all samples, while they were present in plants grown without tetracycline. This could be because antibiotic treatments are the most sensitive indicators of production of lipoxygenase pathway products, while in some cases secondary metabolites increased as the tetracycline concentrations increases, although the content was very low. The aim of the current work was the use of plant-based system for phytoremediation and toxicological impact of tetracycline on basil.