Electrical challenges of heteroepitaxial 3C-SiC on silicon

© 2018 Trans Tech Publications, Switzerland. We have investigated the electrical conduction in epitaxial cubic silicon carbide films on low-doped and high-resistive silicon substrates. The electrical properties of the film/substrate system such as the carrier concentration, carrier mobility, and sheet resistance were evaluated by performing Hall measurements in a van der Pauw configuration at room temperature. For the SiC on low-doped p-Si, we found that the charge carriers in the substrate always dominate the electrical conduction indicating an electrical shorting of the film to the substrate and the absence of a p/n junction. Meanwhile, for the SiC films grown on high-resistive silicon, we found an evidence of current leakage through a silicon region right below the SiC/Si interface, generated upon SiC growth. Leakage resistances in the kΩ range obtained from TLM structures made of isolated SiC pillars on high-resistive silicon confirmed the presence of a conductive region below the SiC/Si interface. This work also shows that this electrical leakage can be supressed using a high-resistive silicon as the substrate and etching away the conductive region below the interface

Electrical leakage phenomenon in heteroepitaxial cubic silicon carbide on silicon

© 2018 Author(s). Heteroepitaxial 3C-SiC films on silicon substrates are of technological interest as enablers to integrate the excellent electrical, electronic, mechanical, thermal, and epitaxial properties of bulk silicon carbide into well-established silicon technologies. One critical bottleneck of this integration is the establishment of a stable and reliable electronic junction at the heteroepitaxial interface of the n-type SiC with the silicon substrate. We have thus investigated in detail the electrical and transport properties of heteroepitaxial cubic silicon carbide films grown via different methods on low-doped and high-resistivity silicon substrates by using van der Pauw Hall and transfer length measurements as test vehicles. We have found that Si and C intermixing upon or after growth, particularly by the diffusion of carbon into the silicon matrix, creates extensive interstitial carbon traps and hampers the formation of a stable rectifying or insulating junction at the SiC/Si interface. Although a reliable p-n junction may not be realistic in the SiC/Si system, we can achieve, from a point of view of the electrical isolation of in-plane SiC structures, leakage suppression through the substrate by using a high-resistivity silicon substrate coupled with deep recess etching in between the SiC structures

2015 ACVIM Small Animal Consensus Statement on Seizure Management in Dogs

This report represents a scientific and working clinical consensus statement on seizure management in dogs based on current literature and clinical expertise. The goal was to establish guidelines for a predetermined, concise, and logical sequential approach to chronic seizure management starting with seizure identification and diagnosis (not included in this report), reviewing decision‐making, treatment strategies, focusing on issues related to chronic antiepileptic drug treatment response and monitoring, and guidelines to enhance patient response and quality of life. Ultimately, we hope to provide a foundation for ongoing and future clinical epilepsy research in veterinary medicine

Electronic and Transport Properties of Epitaxial Graphene on SiC and 3C-SiC/Si: A Review

The electronic and transport properties of epitaxial graphene are dominated by the interactions the material makes with its surroundings. Based on the transport properties of epitaxial graphene on SiC and 3C-SiC/Si substrates reported in the literature, we emphasize that the graphene interfaces formed between the active material and its environment are of paramount importance, and how interface modifications enable the fine-tuning of the transport properties of graphene. This review provides a renewed attention on the understanding and engineering of epitaxial graphene interfaces for integrated electronics and photonics applications.</jats:p

P-Type Epitaxial Graphene on Cubic Silicon Carbide on Silicon for Integrated Silicon Technologies

Copyright © 2019 American Chemical Society. The synthesis of graphene on cubic silicon carbide on silicon pseudosubstrates draws enormous interest due to the potential integration of the 2D material with the well-established silicon technology and processing. However, the control of transport properties over large scales on this platform, essential for integrated electronics and photonics applications, has lagged behind so far, due to limitations such as 3C-SiC/Si interface instability and nonuniform graphene coverage. We address these issues by obtaining an epitaxial graphene (EG) onto 3C-SiC on a highly resistive silicon substrate using an alloy-mediated, solid-source graphene synthesis. We report the transport properties of EG grown over large areas directly on 3C-SiC(100) and 3C-SiC(111) substrates, and we present the corresponding physical models. We observe that the carrier transport of EG/3C-SiC is dominated by the graphene-substrate interaction rather than the EG grain size, sharing the same conductivity and same inverse power law as EG on 4H- or 6H-SiC(0001) substrates - although the grain sizes for the latter are vastly different. In addition, we show that the induced oxidation/silicates at the EG/3C-SiC interface generate a p-type charge in this graphene, particularly high for the EG/3C-SiC(001). When silicates are at the interface, the presence of a buffer layer in the EG/3C-SiC(111) system is found to reduce somewhat the charge transfer. This work also indicates that a renewed focus on the understanding and engineering of the EG interfaces could very well enable the long sought-after graphene-based electronics and photonics integrated on silicon