12 research outputs found
SPECIFICATION-DRIVEN DESIGN OF CUSTOM HARDWARE IN HOP*
We present a language "Hardware viewed as Objects and Processes"
(HOP) for specifying the structure, behavior, and timing of hardware
systems. HOP embodies a simple process model for lock-step synchronous
processes. Processes may be described both as a black-box and as a collection
of interacting sub-processes. The latter can be statically simplified using
an algorithm 'PARCOMP'. PARCOMP symbolically simulates a collection of
interacting processes. The advantages claimed for HOP include simple
semantics, intuitiveness, high expressive power, and numerous provisions
to support easily verifiable designs all the way to VLSI layout.
After introducing HOP, and presenting some of the results obtained from
experimenting with the HOP design system, we present the design of a large
hardware system (the "Utah Simulation Engine") currently being developed
to speed-up distributed discrete event simulation using Time Warp. Issues
in the specification driven design of this system are discussed and
illustrated using HOP.We are currently acquiring citations for the work deposited into this collection. We recognize the distribution rights of this item may have been assigned to another entity, other than the author(s) of the work.If you can provide the citation for this work or you think you own the distribution rights to this work please contact the Institutional Repository Administrator at [email protected]
Partial Orders for Efficient Bounded Model Checking of Concurrent Software ⋆
Abstract. The number of interleavings of a concurrent program makes automatic analysis of such software very hard. Modern multiprocessors’ execution models make this problem even harder. Modelling program executions with partial orders rather than interleavings addresses both issues: we obtain an efficient encoding into integer difference logic for bounded model checking that enables first-time formal verification of deployed concurrent systems code. We implemented the encoding in the CBMC tool and present experiments over a wide range of memory models, including SC, Intel x86 and IBM Power. Our experiments include core parts of PostgreSQL, the Linux kernel and the Apache HTTP server.